T7295-6EL LSI, T7295-6EL Datasheet - Page 56

• Manufacturer Part Number: T7295-6EL
• Manufacturer: LSI

Specifications of T7295-6EL

• Lead Free Status / Rohs Status: Not Compliant

T7121 HDLC Interface for ISDN (HIFI-64)
Timing Characteristics
1.Edge of clock used to sample FS (selected by the FE bit [R0—B6]).
2.Edge of first bit transmission (see Figures 12—20).
3.The CLKXI bit (R9—B4) controls the edge on which data is transmitted, and the CLKRI bit (R9—B0) controls the edge on which received data
56
is sampled.
(CLKRI = 1)
(CLKXI = 0)
(CMS = 0, CLKXI = 0, CLKRI = 1, FSPOL = 1, RBM = TBM = 11111111)
AND/OR
(FE = 1)
TSCA
CLKX
CLKR
DRA
DRB
DXA
DXB
OR
FS
3
3
(continued)
B
1
Figure 23. Timing for Concentration Highway
C
2
D
F
H
A
BIT 0
I
D
J
BIT 7
E
G
Lucent Technologies Inc.
Data Sheet
April 1997
5-5049