MAX19527EVKIT+ Maxim Integrated Products, MAX19527EVKIT+ Datasheet - Page 10

• Manufacturer Part Number: MAX19527EVKIT+
• Description: Data Conversion Modules & Development Tools MAX19527 Eval Kit
• Manufacturer: Maxim Integrated Products

MAX19527 Evaluation Kit
Press Ctrl + Tab to navigate to the tab sheets. The
selected tab sheet is indicated by a dotted outline. Press
the Tab key to select each GUI control. The selected
control is indicated by a dotted outline. Using Shift +
Tab moves the selection to the previously selected con-
trol. Buttons respond to the keyboard's space bar and
some controls respond to the keyboard's up and down
arrow keys. Activate the program's menu bar by press-
ing the F10 key and then press the letter of the desired
menu item. Most menu items have one letter underlined,
indicating their shortcut key.
When a number is entered into the edit boxes, it can be
sent to the device by pressing the Enter key. The data is
also sent when Tab or Shift + Tab is pressed.
The MAX19527 EV kit is a fully assembled and tested
circuit board that contains all the components necessary
to evaluate the performance of the MAX19527 50Msps
octal, 12-bit ADC.
The ADC accepts differential input signals; however,
on-board transformers (T1–T8) convert the single-ended
signals applied to the IN1–IN8 SMA connectors to the
required differential signals. The input signals of the
ADC can be measured using a differential oscilloscope
probe at header J1. The ADC’s digital LVDS output
signals are accessible at header H2. Output drivers
(U4, U5, and U6) are used for buffering the LVDS output
signals when interfacing the EV kit to the DCEP board.
The EV kit can be configured for communicating to the
SPI interface using the on-board USB circuitry or a user-
supplied external 3-wire controller using jumpers JU11
JU12, and JU13.
The EV kit is designed as a six-layer PCB to optimize the
performance of the ADC. Separate analog, digital, and
buffer power planes minimize noise coupling between
analog and digital signals. The analog and clock inputs
Table_3._AVDD_Input_Power_Configuration_
(JU14)
*Default position.
10_ _ ______________________________________________________________________________________
Detailed Description of Hardware
SHUNT_POSITION
Not installed
Installed*
1.8V LDO (U2) powers the AVDD
Power disconnected from the
Keyboard Navigation
AVDD input
AVDD_(V)
input
and the LVDS outputs use 100I differential microstrip
transmission lines. All singled-ended digital outputs use
50I microstrip transmission lines. The trace lengths of
the 100I differential LVDS output lines are matched to
within a few thousands of an inch to minimize layout-
dependent output-signal skew.
The EV kit operates from a single 3.3V DC power supply
applied at the +3.3V and GND PCB pads and provides
on-board regulation to power the IC analog and digital
circuit blocks, and the MAX9392 LVDS buffers.
The analog circuit block (AVDD) is regulated to 1.8V
using the MAX8902A (U2). To power the analog circuit
using the EV kit circuitry, install a shunt on jumper JU14.
To disconnect the 1.8V power source, remove the shunt
at JU14. See Table 3 for proper JU14 configuration.
The digital circuit block (OVDD) is regulated to 1.8V
using the MAX8902A (U3). To power the digital circuit
using the EV kit circuitry, install a shunt on jumper JU15.
To disconnect the 1.8V power source from OVDD,
remove the shunt on JU15. See Table 4 for proper JU15
configuration.
Jumpers JU14 and JU15 are provided to disconnect the
power sources or to measure current through AVDD and
OVDD, respectively.
The data converter allows either differential or single-
ended signals to drive the clock inputs. The EV kit
supports both methods.
In single-ended operation, the clock signal is applied
at the CLK SMA connector and connects to the ADC
through a buffer (U7). In differential mode, an on-board
transformer converts a user-supplied single-ended
analog input and generates a differential analog signal,
which is then applied to the ADC’s input pins. The clock
signal applied to the ADC can be observed at header J2.
Table_4._OVDD_Input_Power_Configuration_
(JU15)
*Default position.
SHUNT_POSITION
Not installed
Installed*
1.8V LDO (U3) powers the OVDD
Power disconnected from the
OVDD input
OVDD_(V)
Power Supplies
input
Clock Input