MAX19527EVKIT+ Maxim Integrated Products, MAX19527EVKIT+ Datasheet - Page 11

• Manufacturer Part Number: MAX19527EVKIT+
• Description: Data Conversion Modules & Development Tools MAX19527 Eval Kit
• Manufacturer: Maxim Integrated Products

To configure the EV kit for single-ended clock operation,
the following modifications must be made to the clock
circuit:
1)
2)
3)
In single-ended clock configuration, potentiometer R94
can be utilized to control the duty cycle of the clock input
signal. Measure the clock input at header J2 and adjust
R94 until the desired duty cycle is achieved.
Although the ADC accepts differential analog input sig-
nals, the EV kit only requires single-ended analog input
signals. Insertion losses due to a series-connected filter
and the interconnecting cables decrease the amount of
power seen at the EV kit input. Account for these losses
when setting the signal generator amplitude. On-board
transformers (T1–T8) convert the single-ended analog
input signals and generate the recommended differential
analog signals at the ADC’s differential input pins.
Jumpers
common-mode voltage to the EV kit input circuit
networks when jumper JU10 is installed. JU10 supplies
the programmed common-mode voltage supplied by the
ADC’s CMOUT output. Install a shunt on JU10 and the
respective IN_ channel jumpers to set the input network
Table_5._IN__Common-Mode_Input-Voltage_Configuration_(JU10,_JU1–JU8)
*Default position.
X = Don’t care
Table_6._SCLK_Input_Configuration_(JU11)
*Default position.
SHUNT_POSITION
Not installed
Cut the traces at locations R99, R103, and R104.
Install 0I resistors at locations R96, R102, and
R105.
Install a 49.9I ±1% resistor at location R98.
Not installed
Installed*
JU10
1-2*
1-3
1-4
SHUNT_POSITION
JU1–JU8
Configuring the EV Kit for Single-Ended
_______________________________________________________________________________________ _ 11
are
Not installed
JU1–JU8
Installed*
Connects to SCLK EV kit level
Connects to header J10-1
Connects to SCLK DCEP
level translator circuitry
X
available
Connects to ground
translator circuitry
SCLK_PIN
Clock Operation
Input Signals
to
provide
Input common-mode voltage disconnected from CMOUT
MAX19527 Evaluation Kit
a
Input networks disconnected from CMOUT
SCLK signal supplied by an external source at header J10
common-mode voltage. See Table 5 for proper jumper
configuration.
The ADC features eight 12-bit, serial, LVDS digital
outputs (OUT_) that transmit the converted differential
analog input signals (IN1–IN8). Two additional outputs
(CLKOUT and FRAME) are provided for system timing.
Refer to the System Timing Requirements section in the
MAX19527 IC data sheet for additional information.
The ADC features trimmed, selectable internal termina-
tion resistors between the positive and negative line
of each output (OUT1–OUT8, CLKOUT, and FRAME).
The EV kit circuit also features 100I termination resis-
tors for the ADC output, located at the inputs of the
MAX9392 LVDS crosspoint switches (U4, U5, and U6).
MAX9392 ICs are used to buffer the ADC’s outputs when
connecting the DCEP board to the EV kit, which allows
monitoring of the output signals at header H2.
The EV kit communicates to the ADC’s SPI interface
using the on-board USB circuitry or external 3-wire
signals (applied at header J10).
Place shunts across pins 1-2 of jumpers JU11, JU12,
and JU13 to control the SPI interface using the USB cir-
cuitry. Remove shunts from JU11, JU12, and JU13 when
using external 3-wire signals at header J10. See Tables
6, 7, and 8 for proper JU11, JU12, and JU13 configura-
tion, respectively.
Input network connected to CMOUT
INPUT_NETWORKS_(IN1–IN8)
COMMON-MODE_SETTING
SCLK signal supplied by USB circuitry
Maintains the ADC register’s content
EV_KIT_FUNCTION
For future use
SPI Interface Control
Output Termination
Output Signals