EVAL-AD9837SDZ Analog Devices Inc, EVAL-AD9837SDZ Datasheet - Page 17
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EVAL-AD9837SDZ
Manufacturer Part Number
EVAL-AD9837SDZ
Description
EVALUATION BOARD
Manufacturer
Analog Devices Inc
Series
-r
Specifications of EVAL-AD9837SDZ
Main Purpose
Timing, Direct Digital Synthesis (DDS)
Embedded
No
Utilized Ic / Part
AD9837
Primary Attributes
-
Secondary Attributes
Graphical User Interface
Kit Application Type
Clock & Timing
Application Sub Type
Clock Generator
Kit Contents
Software CD, USB Cable
Silicon Manufacturer
Analog Devices
Silicon Core Number
AD9837
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
YES
YES
CHANGE FREQUENCY
CONTROL REGISTER
(SEE TABLE 7)
REGISTER?
FSEL BIT?
CHANGE
WRITE
NO
Figure 22. Flowchart for AD9837 Initialization and Operation
PHASE0 AND PHASE1 REG = (PHASESHIFT × 2
WRITE TO FREQUENCY AND PHASE REGISTERS
FSEL = SELECTED FREQUENCY REGISTER
YES
YES
YES
Figure 23. Flowchart for Initialization
PSEL = SELECTED PHASE REGISTER
SELECT FREQUENCY REGISTERS
FREQ0 REG =
FREQ1 REG =
(CONTROL REGISTER WRITE)
(CONTROL REGISTER WRITE)
SELECT PHASE REGISTERS
FROM SIN TO TRIANGLE?
Rev. 0 | Page 17 of 28
CHANGE FREQUENCY?
CHANGE DAC OUTPUT
CHANGE OUTPUT TO
(SEE FIGURE 24)
A DIGITAL SIGNAL?
INITIALIZATION
SET RESET = 0
CHANGE PHASE?
APPLY RESET
RESET BIT = 0
(SEE FIGURE 24)
SELECT DATA
WAIT 7/8 MCLK
RESET = 1
DATA WRITE
SOURCES
CYCLES
f
f
OUT0
OUT1
NO
NO
NO
NO
/
/
f
f
MCLK
MCLK
× 2
× 2
28
28
YES
12
)/2π
(SEE FIGURE 23)
CHANGE PHASE
INITIALIZATION
REGISTER?
PSEL BIT?
CHANGE
NO
YES
YES
AD9837