EVAL-AD9837SDZ Analog Devices Inc, EVAL-AD9837SDZ Datasheet - Page 3

• Manufacturer Part Number: EVAL-AD9837SDZ
• Description: EVALUATION BOARD
• Manufacturer: Analog Devices Inc
• Series: -r

Specifications of EVAL-AD9837SDZ

• Main Purpose: Timing, Direct Digital Synthesis (DDS)
• Embedded: No
• Utilized Ic / Part: AD9837
• Primary Attributes: -
• Secondary Attributes: Graphical User Interface
• Kit Application Type: Clock & Timing
• Application Sub Type: Clock Generator
• Kit Contents: Software CD, USB Cable
• Silicon Manufacturer: Analog Devices
• Silicon Core Number: AD9837
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

SPECIFICATIONS
VDD = 2.3 V to 5.5 V, AGND = DGND = 0 V, T
Table 1.
Parameter
SIGNAL DAC SPECIFICATIONS
DDS SPECIFICATIONS
LOGIC INPUTS
POWER SUPPLIES
1
Operating temperature range is −40°C to +125°C; typical specifications are at 25°C.
Resolution
Update Rate
V
V
V
V
DC Accuracy
Dynamic Specifications
Spurious-Free Dynamic Range (SFDR)
Clock Feedthrough
Wake-Up Time
Input High Voltage, V
Input Low Voltage, V
Input Current, I
Input Capacitance, C
VDD
I
Low Power Sleep Mode
DD
OUT
OUT
p-p
OUT
A Grade
B Grade
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Wideband (0 to Nyquist)
Narrow-Band (±200 kHz)
A Grade
B Grade
Maximum
Minimum
TC
A Grade
B Grade
A Grade
B Grade
A Grade
B Grade
A Grade
B Grade
1
INH
/I
INL
INL
IN
INH
Min
1.7
2.0
2.8
2.3
A
= T
MIN
to T
Typ
10
0.645
37
0.610
200
±1.0
±0.5
−64
−64
−68
−65
−94
−67
1
3
3.7
4.5
0.5
−68
−65
−97
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MAX
, unless otherwise noted.
Max
5
16
0.5
0.7
0.8
10
5.5
5.0
5.5
0.8
Unit
Bits
mV
ppm/°C
LSB
LSB
ms
V
V
V
V
V
V
mA
pF
mA
mA
MSPS
MSPS
V
V
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBc
V
mA
Test Conditions/Comments
f
f
f
f
f
f
f
f
2.3 V to 2.7 V power supply
2.7 V to 3.6 V power supply
4.5 V to 5.5 V power supply
2.3 V to 2.7 V power supply
2.7 V to 3.6 V power supply
4.5 V to 5.5 V power supply
f
I
I
DAC powered down (SLEEP1 and
SLEEP12 bits = 11; see Table 15)
DD
DD
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
code dependent; see Figure 6
code dependent; see Figure 7
= 5 MHz, f
= 16 MHz, f
= 5 MHz, f
= 16 MHz, f
= 5 MHz, f
= 16 MHz, f
= 5 MHz, f
= 16 MHz, f
= 16 MHz, f
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= f
= f
= f
= f
= f
= f
= f
= f
= f
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
/4096
/4096
/50
/50
/4096
/4096
/50
/50
/4096
AD9837