MCP795W10-I/SL Microchip Technology, MCP795W10-I/SL Datasheet - Page 19

• Manufacturer Part Number: MCP795W10-I/SL
• Description: SPI GPP RTCC, 1Kb EE, 64B SRAM, WD Timer, Event Detect, ID 14 SOIC .150in TUBE
• Manufacturer: Microchip Technology

REGISTER 6-4:
REGISTER 6-5:
 2011-2012 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
bit 7
bit 6-4
bit 3
bit 2-0
Note 1:
bit 7
Legend:
R = Readable bit
bit 7-6
bit 5-4
bit 3-0
ALM0PIN
R/W
U-0
—
Contains the BCD day. The range is 1-7. Also, additional bits are used for configuration and status.
bit 6
ALM0PIN: Alarm 0 Output Pin Configuration bit
This pin configures the pin that is used for the Alarm 0 output. If this bit is clear the IRQ pin is used. If
set, the WDO pin is used. If the WDT is enabled then a valid alarm will assert the WDO pin for 122
us.
ALM0C<2:0>: Alarm 0 Configuration bits
Sets the condition on what the alarm will trigger. The following options are available:
ALM0IF: Alarm 0 Interrupt Flag bit
This bit is set by hardware when an alarm condition has been generated. The bit must be cleared in
software.
DAY<2:0>
bit 6
Unimplemented: Read as ‘0’
10 DATE<1:0>
DATE<3:0>
ALM0C2
- 000 – Seconds match
- 001 – Minutes match
- 010 – Hours match (logic takes into account 12/24 operation)
- 011 – Day match. Generates interrupt at 12:00:00 AM
- 100 – Date match
- 101 – Unimplemented, do not use
- 110 – Unimplemented, do not use
- 111 – Seconds, Minutes, Hour, Day, Date and Month
U-0
—
DAY 0
DATE 0
X
0F
bit 5
W = Writable bit
bit 5
W = Writable bit
X
10
ALM0C1
R/W
10 Date
R/W
bit 4
bit 4
ALM0C0
MCP795WXX/MCP795BXX
Preliminary
bit 3
U = Unimplemented bit, read as ‘0’
bit 3
U = Unimplemented bit, read as ‘0’
ALM0IF
R/W
bit 2
Date
R/W
R/W
Day
DS22280B-page 19
bit 0
bit 0