STM32L152VBT6 STMicroelectronics, STM32L152VBT6 Datasheet - Page 105

• Manufacturer Part Number: STM32L152VBT6
• Description: 16/32-BITS MICROS
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32L152VBT6

• Processor Series: STM32L152
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 128 KB
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-100
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 83
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 24x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Lead Free Status / Rohs Status: Details

STM32L151xx, STM32L152xx
9
Revision history
Table 65.
16-Dec-2010
25-Feb-2011
on
01-Oct-2010
02-Jul-2010
Date
Document revision history
Revision
1
2
3
4
Initial release.
Removed 5 V tolerance (FT) from PA3, PB0 and PC3 in
STM32L15xxx pin definitions on page 30
Updated
characteristics on page 46
Updated
Added
Updated
Modified consumptions on page 1 and in
modes on page 13
LED_SEG8 removed on PB6
Updated
VFQFPN48 replaced by UFQFPN48
Features: updated value of Low-power sleep.
Section 3.3.2: Power supply
Table 4: STM32L15xxx pin
reset) and alternate function for OSC_IN and OSC_OUT pins; modified
footnote 5; added footnote to OSC32_IN and OSC32_OUT pins; C1
and D1 removed on PD0 and PD1 pins (TFBGA64 column).
Section 3.11: DAC (digital-to-analog
Table 6: Voltage
Table 7: Current
and negative injection.
Table 11: Embedded reset and power control block
updated typ and max values for T
Table 13: Current consumption in Run mode, code with data
processing running from
(16 MHz), Range 3.
Table 14: Current consumption in Run mode, code with data
processing running from
(16 MHz), Range 3.
Table 15: Current consumption in Sleep
clock source (16 MHz), Range 3 for both RAM and Flash; changed
units.
Table 16: Current consumption in Low power run
parameter and max value of I
Table 17: Current consumption in Low power sleep
symbol, parameter, and max value of I
Table 18: Typical and maximum current consumptions in Stop
updated values for I
clock (32.768 kHz), regulator in LP mode, HSI and HSE OFF (no
independent watchdog).
Doc ID 17659 Rev 4
Table 48: ADC clock frequency on page 84
Table 11: Embedded reset and power control block
Table 12: Embedded internal reference voltage on page 48
Table 49: ADC characteristics on page 84
Section 6: Electrical characteristics on page 41
characteristics: updated footnote 3 regarding I
characteristics: updated footnote 4 regarding positive
DD (Stop with RTC)
Flash: removed values for HSI clock source
RAM: removed values for HSI clock source
definitions: modified main function (after
supervisor: updated note.
DD
Changes
Max (LP Run).
RSTTEMPO
- RTC clocked by LSE external
converter): updated bullet list.
DD
mode: removed values for HSI
Section 3.1: Low power
Max (LP Sleep).
(V
DD
mode: updated
rising, BOR enabled).
characteristics:
mode: updated
Revision history
Table 4:
mode:
INJ(PIN)
105/107
.