DC1540A Linear Technology, DC1540A Datasheet - Page 38

• Manufacturer Part Number: DC1540A
• Description: LTC2978 Demoboard (includes DC1360A + DC1361A), Requires DC1613A
• Manufacturer: Linear Technology
• Series: -r

Specifications of DC1540A

• Design Resources: DC1540 Design File
• Main Purpose: Power Management, Power Supply Supervisor/Tracker/Sequencer
• Embedded: No
• Utilized Ic / Part: LTC2978
• Primary Attributes: Voltage Detector & Supervisor
• Secondary Attributes: -
• Kit Application Type: Power Management
• Application Sub Type: Power Supply Controller
• Features: Demonstration System For The LTC2978 Octal I2C / SMBus / PMBus Power Supply Monitor & Controller
• Lead Free Status / Rohs Status: Not applicable / Not applicable

MFR_PWRGD_EN
This command register controls the mapping of power
good status to the power good pin. Note that odd num-
bered channels whose ADC is in high res mode do not
contribute to power good.
MFR_PWRGD_EN Data Contents
LTC2978
operaTion

b[15:9] Reserved
BIT(S) SYMBOL
b[8]
b[7]
b[6]
b[5]
b[4]
b[3]
b[2]
b[1]
b[0]
Mfr_pwrgd_en_wdog
Mfr_pwrgd_en_chan7
Mfr_pwrgd_en_chan6
Mfr_pwrgd_en_chan5
Mfr_pwrgd_en_chan4
Mfr_pwrgd_en_chan3
Mfr_pwrgd_en_chan2
Mfr_pwrgd_en_chan1
Mfr_pwrgd_en_chan0
OPERATION
Read only, always returns 0s.
Watchdog
1 = Watchdog timer not-expired status is ANDed with PWRGD status for any similarly enabled channels to
determine when the PWRGD pin gets asserted.
0 = Watchdog timer does not affect the PWRGD pin.
Channel 7
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 6
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 5
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 4
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 3
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 2
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 1
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
Channel 0
1 = PWRGD status for this channel is ANDed with PWRGD status for any similarly enabled channels to determine
when the PWRGD pin gets asserted.
0 = PRWGD status for this channel does not affect the PWRGD pin.
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