DS26514GN+ Maxim Integrated Products, DS26514GN+ Datasheet - Page 297
![IC TXRX T1/E1/J1 4PORT 256-CSBGA](/photos/6/50/65053/256-csbga_21-0315_sml.jpg)
DS26514GN+
Manufacturer Part Number
DS26514GN+
Description
IC TXRX T1/E1/J1 4PORT 256-CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheet
1.DS26514GN.pdf
(305 pages)
Specifications of DS26514GN+
Number Of Drivers/receivers
4/4
Protocol
Ethernet
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
256-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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14.
The DS26514 IEEE 1149.1 design supports the standard instruction codes SAMPLE:PRELOAD, BYPASS, and
EXTEST. Optional public instructions included are HIGHZ, CLAMP, and IDCODE. See
contains the following as required by IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture.
The Test Access Port has the necessary interface pins: JTRST , JTCLK, JTMS, JTDI, and JTDO. See the pin
descriptions for details.
Figure 14-1. JTAG Functional Block Diagram
Rev: 101608
JTAG BOUNDARY SCAN AND TEST ACCESS PORT
Test Access Port (TAP)
TAP Controller
Instruction Register
10k Ω
V
DD
JTDI
10k Ω
V
DD
JTMS
TEST ACCESS PORT
BOUNDRY SCAN
IDENTIFICATION
CONTROLLER
INSTRUCTION
REGISTER
REGISTER
REGISTER
REGISTER
BYPASS
JTCLK
10k Ω
V
DD
JTRST
SELECT
OUTPUT ENABLE
Bypass Register
Boundary Scan Register
Device Identification Register
MUX
DS26514 4-Port T1/E1/J1 Transceiver
Table
JTDO
14-1. The DS26514
297 of 305
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