74LVC1284PW,112 NXP Semiconductors, 74LVC1284PW,112 Datasheet - Page 2

• Manufacturer Part Number: 74LVC1284PW,112
• Description: IC PRINT INTFC TXRX/BUFF 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr
• Type: Transceiverr

Specifications of 74LVC1284PW,112

• Number Of Drivers/receivers: 4/4
• Protocol: IEEE 1284
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Number Of Transmitters: 1
• Number Of Receivers: 1
• Power Supply Requirement: Single
• Package Type: TSSOP
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 20
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-2999-5; 935213670112

Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN CONFIGURATION
1995 Nov 10
SYMBOL
20-pin plastic SO
20-pin plastic SSOP Type II
20-pin plastic TSSOP Type I
t
Asynchronous operation
4-Bit transceivers
3 additional buffer/driver lines
TTL compatible inputs
ESD protection exceeds 1000V per MIL STD 883 Method 3015
and 200V per Machine Model
Input Hysteresis
Low Noise Operation
Center Pin V
IEEE 1284 Compliant Level 1 & 2
Overvoltage Protection on B side
3.3V Parallel printer interface transceiver/buffer
PLH
A –B/Y
V
I
R
SR
HYS
CC
/t
D
PHL
CC
B/Y Side output resistance
B/Y Side slew rate
Total static current
Input hysteresis
Propagation delay
to the B/Y side outputs
& GND
GND
GND
PACKAGES
DIR
A2
A3
A4
A5
A6
A7
A1
10
1
2
3
4
5
6
7
8
9
PARAMETER
SK00001
20
19
18
17
16
15
14
13
12
11
B1
B2
B3
B4
V
V
Y5
Y6
Y7
HD
CC
CC
TEMPERATURE RANGE
0 C to +70 C
0 C to +70 C
0 C to +70 C
V
CC
R
2
= 3.3V; V
L
= 62 ; C
DESCRIPTION
The 74LVC1284 parallel interface chip is designed to provide an
asynchronous, 4-bit, bi-directional, parallel printer interface for
personal computers. Three additional lines are included to provide
handshaking signals between the host and the peripheral. The part
is designed to match IEEE 1284 standard.
The 4 transceiver pins (A/B 1-4) allow data transmission from the A
bus to the B bus, or from the B bus to the A bus, depending on the
state of the direction pin DIR.
The B bus and the Y5-Y7 lines have totem pole or open drain style
outputs depending on the state of the high drive enable pin HD.
The A bus only has totem pole style outputs. All inputs are TTL
compatible with at least 300mV of input hysteresis at V
LOGIC SYMBOL
T
amb
V
O
I
= V
L
CONDITIONS
= 1.65V "0.2V (See Figure 2)
= 25 C; GND = 0V
= 50pF (See Waveform 4)
V
V
CC
CC
DIR
CC
A1
A2
A3
A4
A5
A6
A7
/GND; I
= 3.3V
= 3.3V
74LVC1284 PW
74LVC1284 DB
ORDER CODE
7LVC1284 D
A
A
O
= 0
B
B
A
A
A
A
A
TYPICAL
12.6/12.4
DRAWING NUMBER
74LVC1284
Product specification
0.2
0.4
45
Y
Y
Y
5
B
B
SK00009
SOT163-1
SOT339-1
SOT360-1
853-1819 16000
B1
B2
B3
B4
Y5
Y6
Y7
HD
CC
= 3.3V.
UNIT
V/ns
ns
V
A