MC145572APB Freescale Semiconductor, MC145572APB Datasheet - Page 24

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MC145572APB

Manufacturer Part Number
MC145572APB
Description
IC ISDN INTERFACE TXCVER 44-LQFP
Manufacturer
Freescale Semiconductor
Type
Transceiverr
Datasheets

Specifications of MC145572APB

Protocol
RS232
Voltage - Supply
5V
Mounting Type
Surface Mount
Package / Case
44-LQFP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Lead Free Status / Rohs Status
Not Compliant

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NTSCPEN: SCP Enable (NT U-Interface Transceiver SCP EN).
This signal, when held low, selects the Serial Control Port (SCP) for the transfer of control, status, and
data information into and out of the MC145572 U-Interface Transceiver on the NT1 side (U17).
2.6.1
DREQ: S/T-Interface Transceiver DREQUEST.
In the TE mode, this signal is used to indicate to the MC145574 that an external device wishes to transmit
a layer 2 frame to the NT on the D-channel. Refer to the MC145574 ISDN S/T-Interface Transceiver data
sheet.
DGRANT: S/T-Interface Transceiver DGRANT.
In the TE mode, DGRANT operates as a D-channel grant or clear indication. Refer to the MC145574 ISDN
S/T-Interface Transceiver data sheet.
Pin No.
2 Ð 20
EVEN
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
1
3
5
7
9
NTIDLRx is connected to IDLTx pin of the MC145574 S/T-Transceiver. If it is desired for an
external device to receive IDL data from the MC145574, the signal ÒNTIDLRxÓ must be
connected to the IDL receive input of the external device.
NTIDLTx is connected to IDLRx pin of the MC145574 S/T-Transceiver. If it is desired for an
external device to receive IDL data from the MC145574, the signal ÒNTIDLTxÓ must be
connected to the IDL receive input of the external device.
NT Signal Header (JP7) Pin Descriptions
NTSCPCLK
Silkscreen
NTSCPEN
NTIDLCLK
STSCPEN
NTFREFO
NTGTCLK
LTSCPEN
NTSCPTx
DGRANT
NTIDLRx
NTIDLTx
NTSFAR
NTSFAX
NTFREF
NTIRQL
SCPRx
NTFSR
NTFSX
STIRQ
DREQ
GND
Ground
S/T-Interface Transceiver DREQUEST
S/T-Interface Transceiver DGRANT
SCP Enable (NT U-Interface Transceiver)
SCP Enable ST (ST-Interface Transceiver)
SCP Enable (LT U-Interface Transceiver)
SCP Clock
SCP Transmit Output from MC145572s
SCP Receive Input to MC145572s
Interrupt Request (NT U-Interface Transceiver)
IDL Clock (NT U-Interface Transceiver)
IDL Receive Input (NT U-Interface Transceiver)
IDL Transmit Output (NT U-Interface Transceiver)
FSR Frame Sync (NT U-Interface Transceiver)
FSX Frame Sync (NT U-Interface Transceiver)
Interrupt Request ST (S/T-Interface Transceiver)
Receive Superframe Alignment (NT U-Interface Transceiver)
Transmit Superframe Alignment (NT U-Interface Transceiver)
Synchronized Recovered Clock Output When in MCU Mode of Operation (NT U-Interface Transceiver)
Synchronized Recovered Clock Output When in GCI Mode of Operation (NT U-Interface Transceiver)
Demultiplexed Time Slot Clock Out (NT U-Interface Transceiver)
Table 2-3. NT1 DATA Signal Header (J22) Quick Reference
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
NOTE 1
NOTE 2
Functional Description
MC145572EVK
25

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