MC145572APB Freescale Semiconductor, MC145572APB Datasheet - Page 25

• Manufacturer Part Number: MC145572APB
• Description: IC ISDN INTERFACE TXCVER 44-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145572APB

• Protocol: RS232
• Voltage - Supply: 5V
• Mounting Type: Surface Mount
• Package / Case: 44-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant

STSCPEN: SCP Enable ST (S/T-Interface Transceiver SCP EN).
This signal, when held low, selects the Serial Control Port (SCP) for the transfer of control, status, and
data information into and out of the MC145574 S/T-Interface Transceiver (U17).
LTSCPEN: SCP Enable (LT U-Interface Transceiver SCP EN).
This signal, when held low, selects the Serial Control Port (SCP) for the transfer of control, status, and
data information into and out of the MC145572 U-Interface Transceiver on the LT side (U1). NOTE: There
is no corresponding interrupt line from U1 to the microcontroller on the NT side of the board.
SCPCLK: SCP Clock (SCP CLK).
SCPCLK is used for controlling the transfer of data into and out of the SCP registers of the U17 S/T chip.
Data is shifted into the devices from SCPRx on rising edges of SCPCLK. Data is shifted out of the devices
on SCPTx on falling edges of SCPCLK. SCPCLK can be any frequency up to 4.096 MHz.
SCPTx: SCP Transmit Output (SCP Tx).
SCPTx is used to output control, status, and data information from the two MC145572 U-Interface
Transceivers and the MC145574 S/T-Interface Transceiver.
SCPRx: SCP Receive Input (SCP Rx).
SCPRx is used to input control, status, and data information to the two MC145572 U-Interface Transceivers
and the MC145574 S/T-Interface Transceiver.
NTIRQ: Interrupt Request 1 (NT U-Interface Transceiver IRQ).
The IRQL1 pin is an active low open drain output used to signal the MCU devices that an interrupt condition
exists in the NT1 MC145572 U-Interface Transceiver (U10). On clearing the interrupt condition, the NTIRQ
pin is returned to the high state.
NTIDLCLK: (NT U-Interface Transceiver Pin DCL).
This pin is an input when the MC145572 is in slave mode and an output when the MC145572 is in master
mode, as established by switch S4-1, MAS/SLV. As a timing master in NT mode, this pin provides a 512 kHz,
2.048 MHz, or a 2.56 MHz clock frequency. In GCI mode the 2.56 MHz clock is not available. In GCI mode
S1-4, GCI2048/GCI512 selects the clock rate on this pin. In slave mode this pin accepts any clock frequency
from 512 kHz to 8.192 MHz, inclusive.
NTIDLRx: (NT U-Interface Transceiver Pin D
This pin is the input for the 2B+D data to be transmitted onto the NT1 U-Interface. Data bits are input on
sequential falling edges of the NTIDLCLK signal beginning immediately after the FSX pulse occurs. The
NTIDLRx pin is a donÕt care except during valid B- and D-channel data positions. Note that the M and the
A bits used in the IDL Interface of the MC145574 S/T-Interface Transceiver are not used by the MC145572,
and, therefore, are not received by the MC145572.
NTIDLTx: (NT U-Interface Transceiver Pin D
This pin is the output for the 2B+D data received at the NT1 U-Interface. Data bits are output on rising
edges of the IDL CLK signal beginning immediately after the FSR pulse occurs. The NTIDLTx signal
remains in a high impedance state when not outputting 2B+D data or when a valid FSR signal is missing.
MC145572EVK
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