ST62T09CM6 STMicroelectronics, ST62T09CM6 Datasheet - Page 25

• Manufacturer Part Number: ST62T09CM6
• Description: Microcontrollers (MCU) OTP EPROM 1K No Intf
• Manufacturer: STMicroelectronics

Specifications of ST62T09CM6

• Processor Series: ST62T0x
• Core: ST6
• Data Bus Width: 8 bit
• Program Memory Type: EPROM
• Program Memory Size: 1 KB
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOP-20
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / Rohs Status: Details

RESET (Cont’d)
5.3.3 RESET Pin
The RESET pin may be connected to a device on
the application board in order to reset the MCU if
required. The RESET pin may be pulled low in
RUN, WAIT or STOP mode. This input can be
used to reset the internal state of the MCU and en-
sure it starts-up correctly. The pin, which is con-
nected to an internal pull-up, is active low and fea-
tures a Schmitt trigger input. A delay (2048 clock
cycles) added to the external signal ensures that
even short pulses on the RESET pin are accepted
as valid, provided V
phase and that the oscillator is running correctly
(normal RUN or WAIT modes). The MCU is kept in
the Reset state as long as the RESET pin is held
low.
Figure 14. Reset Block Diagram
1) Resistive ESD protection.
RESET
DD
has completed its rising
R
ESD
1)
R
V
PU
DD
f
If the RESET pin is grounded while the MCU is in
RUN or WAIT modes, processing of the user pro-
gram is stopped (RUN mode only), the I/O ports
are configured as inputs with pull-up resistors and
the main oscillator is restarted. When the level on
the RESET pin then goes high, the initialization se-
quence is executed at the end of the internal delay
period.
If the RESET pin is grounded while the MCU is in
STOP mode, the oscillator starts up and all the I/O
ports are configured as inputs with pull-up resis-
tors. When the RESET pin level then goes high,
the initialization sequence is executed at the end
of the internal delay period.
A simple external RESET circuitry is shown in
ure
cation note AN669.
INT
15. For more details, please refer to the appli-
ST6208C/ST6209C/ST6210C/ST6220C
WATCHDOG RESET
LVD RESET
INTERNAL
RESET
25/104
Fig-
1