Z8623012PSG Zilog, Z8623012PSG Datasheet - Page 34

• Manufacturer Part Number: Z8623012PSG
• Description: IC SMART V-CHIP W/2ND I2C 18-DIP
• Manufacturer: Zilog
• Type: Video Decoderr

Specifications of Z8623012PSG

• Applications: Set-Top Boxes, TV
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: Z8623x
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: CMOS
• Maximum Clock Frequency: 12 MHz
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / Rohs Status: Details

6.1.16 Blocking Control Register 2
34
C
ONTROL
T
D
rated according to the Canadian French Language Ratings standards, and this bit
is set to High.
D
G-rated according to the Canadian French Language Ratings standards, and this
bit is set to High.
D
8ans+-rated in Canadian French Language Ratings standards, and this bit is set to
High.
D
13ans+-rated in Canadian French Language Ratings standards, and this bit is set
to High.
D
16ans+-rated in Canadian French Language Ratings standards, and this bit is set
to High.
D
gram is 18ans+-rated according to the Canadian French Language Ratings and
this bit is set to High.
D
N
video program possesses the corresponding Canadian French Language Rating. The
device outputs High onto pin 13 only when a bit is set to High and it recovers the corre-
sponding Canadian French Language Rating in the incoming video program.
T
D
has No Rating and this bit is set to Low. Setting this bit to High disables blocking
on No Rating.
Bit
R/W
Bit
R/W
ABLE
ABLE
R
0
1
2
3
4
5
6
OTE
0
-E.
-G.
-8ans+.
-13ans+.
-16ans+.
-18ans+.
-D
-BNR.
EGISTERS
:
7
The Z86230 outputs High on pin 13 when the incoming video program is E-
-Res.
The Z86230 outputs High on pin 13 when the incoming video program is
The Z86230 outputs Low when a bit in this register is set to Low and the incoming
26. C
27. B
The Z86230 outputs High on pin 13 when the incoming video program
The Z86230 outputs High on pin 13 when incoming video program is
Reserved. These bits must be kept Low(0).
The Z86230 outputs High on pin 13 when incoming video program is
The Z86230 outputs High on pin 13 when incoming video program is
The Z86230 outputs High on pin 13 when the incoming video pro-
ONTENT
LOCKING
Z86230—PRELIMINARY
res
res
R
7
R
7
A
C
DVISORY
ONTROL
res
res
R
6
R
6
18ans+ 16ans+ 13ans+ 8ans+
R
R
R/W
EGISTER
ATINGS
res
5
R
5
S
2 (A
R/W
ELECT
res
4
R
4
DDRESS
R
EGISTER
R/W
res
R
3
3
= 11A
6 (A
R/W
res
H
2
R
2
)
PS000401-TVC0699
DDRESS
R
EGISTERS
R/W
res
G
R
1
1
= 10h)
S
UMMARY
BNR
R/W
R/W
0
E
0