Z8623012PSG Zilog, Z8623012PSG Datasheet - Page 49

• Manufacturer Part Number: Z8623012PSG
• Description: IC SMART V-CHIP W/2ND I2C 18-DIP
• Manufacturer: Zilog
• Type: Video Decoderr

Specifications of Z8623012PSG

• Applications: Set-Top Boxes, TV
• Voltage - Supply, Digital: 4.75 V ~ 5.25 V
• Mounting Type: Through Hole
• Package / Case: 18-DIP (0.300", 7.62mm)
• Processor Series: Z8623x
• Core: Z80
• Data Bus Width: 8 bit
• Program Memory Type: CMOS
• Maximum Clock Frequency: 12 MHz
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Lead Free Status / Rohs Status: Details

8.5.3 Line 21 Input Parameters (at 1.0V p-p)
PS000401-TVC0699
E
Line 21 must be in its proper position to the leading edge of the Vertical Sync sig-
nal.
T
Parameter
Code Amplitude
Code Zero Level
Start of Code
Start of the Data
N
One IRE equals 1/140th of the composite video signal's peak-to-peak voltage. IRE is
the former name of what is now known as the Institute of Electrical and Electronics
Engineers (IEEE).
LECTRICAL
ABLE
OTE
: *A relative unit of measure developed by the Institute of Radio Engineers (IRE).
40. L
C
HARACTERISTICS
INE
21 I
Z86230—PRELIMINARY
NPUT
Conditions
50 IRE*
5 IRE, +15 IRE relative to Back Porch
10.5 ±0.5 µs (measure from the midpoint of the leading
edge of the composite video Hsync pulse to the
midpoint of the rising edge of the first clock run-in
cycle.)
3.972 ms, –0.00 µs, +0.30 µs (measure from the
midpoint of the falling edge of the most recent clock
run-in cycle to the midpoint of the rising edge of the
start bit.)
P
ARAMETERS
E
LECTRICAL
C
HARACTERISTICS
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