HMP8156ACNZ Intersil, HMP8156ACNZ Datasheet - Page 27

IC VIDEO ENCODER NTSC/PAL 64MQFP

HMP8156ACNZ

Manufacturer Part Number
HMP8156ACNZ
Description
IC VIDEO ENCODER NTSC/PAL 64MQFP
Manufacturer
Intersil
Type
NTSC/PAL Encoderr
Datasheet

Specifications of HMP8156ACNZ

Applications
Multimedia, Video Editing
Voltage - Supply, Analog
4.75 V ~ 5.25 V
Voltage - Supply, Digital
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Package / Case
64-MQFP, 64-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HMP8156ACNZ
Manufacturer:
Intersil
Quantity:
10 000
Electrical Specifications
NOTES:
DAC to DAC Matching
VREF Output Voltage
VREF Output Current
VREF Input Voltage
VREF Input Current
AC PARAMETERS, ANALOG OUTPUTS
Differential Gain Error
Differential Phase Error
SNR (Weighted)
Hue Accuracy
Color Saturation Accuracy
Luminance Nonlinearity
Residual Subcarrier
SCH Phase
Analog Output Skew, T
Analog Output Delay, T
DAC-DAC Crosstalk
Glitch Energy
AC PARAMETERS, DIGITAL INPUTS AND OUTPUTS EXCEPT SCL AND SDA
Setup Time, T
Hold Time, T
CLK2 Frequency
CLK2 High Time, CLK2
CLK2 Low Time, CLK2
CLK2 to Output Delay, T
RESET* Pulse Width Low, T
AC PARAMETERS, SCL AND SDA (I
All AC parameters meet the fast-mode I
POWER SUPPLY CHARACTERISTICS
DAC PSRR at DC
Power Supply Range, V
Normal Supply Current, I
Power-Down Supply Current, I
Power Dissipation
4. Output level is dependent on the voltage on VREF, the value of RSET, and the load.
5. If using an external voltage reference, it is not powered down. The internal voltage reference is always powered down.
6. The supply voltage rejection is the relative variation of the full-scale output driving a 37.5Ω load for a ±0.5% supply variation:
External Voltage Reference
PSRR = 20 x log (ΔV
H
S
PARAMETER
L
ASK
AD
H
AA
D
AA
AA
/ΔV
RES
AA
OUT
27
V
).
AA
2
= +5V ±5%, RSET = 133Ω, VREF Unconnected, T
C INTERFACE)
2
C Bus Interface specification.
VREF = 1.230V (Figure 37), RSET = 140Ω
Pin not driven, using internal reference
Pin connected to external reference shown in
Figure 37.
Using analog output filter shown in Figure 38A.
SCH Phase Reset enabled
Using analog output filter shown in Figure 38A.
Includes clock and data feedthrough
Note 6
Note 5
HMP8154, HMP8156A
TEST CONDITION
A
= 25
o
C, Unless Otherwise Specified (Continued)
1.112
-500
MIN
1.13
13.6
13.6
4.75
-50
8
0
2
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.195
1.230
1100
TYP
±1.5
-60
-60
5.0
70
35
64
1
1
2
2
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.358
MAX
1300
1.32
30.0
20.3
20.3
5.25
±10
500
260
750
50
12
12
5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
August 20, 2009
Degree
Degree
Degree
UNITS
Cycles
FN4343.5
pV-s
MHz
CLK
mW
mA
μA
μA
dB
dB
dB
dB
μA
ns
ns
ns
ns
ns
ns
ns
%
%
%
%
%
V
V
V

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