ADV7303AKST Analog Devices Inc, ADV7303AKST Datasheet - Page 35

IC DAC VIDEO HDTV 6-11BIT 64LQFP

ADV7303AKST

Manufacturer Part Number
ADV7303AKST
Description
IC DAC VIDEO HDTV 6-11BIT 64LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7303AKST

Rohs Status
RoHS non-compliant
Applications
DVD, Set-Top Boxes
Voltage - Supply, Analog
2.37 V ~ 2.63 V
Voltage - Supply, Digital
2.37 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Number Of Dac's
6
Adc/dac Resolution
11b
Screening Level
Commercial
Package Type
LQFP
Pin Count
64
Lead Free Status / RoHS Status
Compliant

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VERTICAL BLANKING INTERVAL
The ADV7302A/ADV7303A accepts input data that contains
VBI data [CGMS, WSS, VITS, etc.] in SD and HD Modes.
For SMPTE293M (525 p) standards, VBI data can be inserted on
Lines 13 to 42 of each frame, or Lines 6 to 43 for ITU-R.BT1358
(625 p) standard.
For SD NTSC this data can be present on Lines 10 to 20, in
PAL on Lines 7 to 22.
If VBI is disabled [Address 11h, Bit 4 for HD; Address 43h,
Bit 4 for SD] VBI data is not present at the output and the
entire VBI is blanked. These control bits are valid in all master
and slave modes.
In Slave Mode 0, if VBI is enabled, the Blanking Bit in the
EAV/SAV code is overwritten and it is possible to use VBI in
this timing mode as well.
In Slave Mode 1 or 2, the BLANK Control Bit must be set to
enabled [Address 4Ah, Bit 3] to allow VBI data to pass through
the ADV7302A/ADV7303A. Otherwise the ADV7302A/
ADV7303A automatically blanks the VBI to standard.
If CGMS is enabled and VBI disabled, the CGMS data will
nevertheless be available at the output.
SUBCARRIER FREQUENCY REGISTER
[Subaddress 4Ch–4Fh]
Four 8-bit wide registers are used to set up the subcarrier fre-
quency. The value of these registers is calculated in using the
equation:
Example:
NTSC Mode
Subcarrier Register Value = 21F07C1Eh
Refer to the MPU Port Description section for more detail on
how to access the Subcarrier Frequency Registers.
SUBCARRIER PHASE REGISTER
[Subaddress 50h, 5Ch, Bits 7, 6]
Ten bits are used to set up the subcarrier phase. Each bit repre-
sents 0.352°. For normal operation, this register is set to 00h.
*Rounded to the nearest integer
REV. A
Subcarrier Frequency =
Subcarrier Frequency Register =
#
SD F
SD F
SD F
SD F
of Subcarrier Frequency Cycles in One Video Line
#
of
SC
SC
SC
SC
27
Register 0: 1Eh
Register 1: 7Ch
Register 2: F0h
Register 3: 21h
MHz Clock Cycles in One Video Line
227 5
1716
.
×
2
32
=
569408542
*
×
2
32
–35–
FILTERS
Table XV shows an overview of the programmable filters avail-
able on the ADV7302A/ADV7303A.
Filter
SD Luma LPF NTSC
SD Luma LPF PAL
SD Luma Notch NTSC
SD Luma Notch PAL
SD Luma SSAF
SD Luma CIF
SD Luma QCIF
SD Chroma 0.65 MHz
SD Chroma 1.0 MHz
SD Chroma 1.3 MHz
SD Chroma 2.0 MHz
SD Chroma 3.0 MHz
SD Chroma CIF
SD Chroma QCIF
SD UV SSAF
HD Chroma Input
HD Sync Filter
HD Chroma SSAF
HD Sync Filter
–0.1
–0.2
–0.3
–0.4
–0.5
–0.1
–0.2
–0.3
–0.4
–0.5
0.5
0.4
0.3
0.2
0.1
0.5
0.4
0.3
0.2
0.1
0
0
0
0
Figure 32. HD Sync Filter Disabled
Figure 31. HD Sync Filter Enabled
Table XV. Selectable Filters
5
5
10
10
ADV7302A/ADV7303A
FREQUENCY – MHz
FREQUENCY – MHz
15
15
Subaddress
40h
40h
40h
40h
40h
40h
40h
40h
40h
40h
40h
40h
40h
40h
42h
13h
13h
13h
20
20
25
25
30
30

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