PCA9502BS,128 NXP Semiconductors, PCA9502BS,128 Datasheet - Page 15

• Manufacturer Part Number: PCA9502BS,128
• Description: IC I/O EXPANDER I2C/SPI 24HVQFN
• Manufacturer: NXP Semiconductors

Specifications of PCA9502BS,128

• Package / Case: 24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
• Interface: I²C, SPI
• Number Of I /o: 8
• Interrupt Output: No
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: PCA9502
• Number Of Lines (input / Output): 8.0 / 8.0
• Operating Supply Voltage: 2.5 V to 3.3 V
• Power Dissipation: 300 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 5.5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Number Of Input Lines: 8.0
• Number Of Output Lines: 8.0
• Output Current: 10 mA
• Output Voltage: 5.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935281363128; PCA9502BS-F; PCA9502BS-F

NXP Semiconductors
Table 15.
V
[1]
13. Dynamic characteristics
Table 16.
All the timing limits are valid within the operating supply voltage, ambient temperature range and output load;
V
All output load = 25 pF, except SDA output load = 400 pF.
[1]
[2]
PCA9502_3
Product data sheet
Symbol
I
V
V
I
C
Symbol Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
2
L
SCL
BUF
HD;STA
SU;STA
SU;STO
HD;DAT
VD;ACK
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
d1
d4
d5
DD
DD
C-bus inputs SCL, CS/A0, SI/A1
IH
IL
i
= (2.5 V
5.5 V steady state voltage tolerance on inputs and outputs is valid only when the supply voltage is present. 3.8 V steady state voltage
tolerance on inputs and outputs when no supply voltage is present.
= (2.5 V
A detailed description of the I
may be ordered using the code 9398 393 40011.
Minimum SCL clock frequency is limited by the bus time-out feature, which resets the serial bus interface if SDA is held LOW for a
minimum of 25 ms.
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data hold time
data valid acknowledge time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
I
I2C input pin interrupt valid time
I2C input pin interrupt clear time
2
Parameter
HIGH-level input voltage
LOW-level input voltage
leakage current
input capacitance
Static characteristics
I
C-bus GPIO output valid time
2
C-bus timing specifications
0.2 V) or (3.3 V
0.2 V) or (3.3 V
2
C-bus specification, with applications, is given in brochure “The I
0.3 V); T
0.3 V); T
…continued
amb
amb
Conditions
input; V
= 40 C to +85 C; unless otherwise specified.
= 40 C to +85 C; refer to V
Rev. 03 — 13 October 2006
I
= 0 V or 5.5 V
Conditions
SCL LOW to data out valid
[1]
[1]
8-bit I/O expander with I
IL
and V
Min
1.6
V
[2]
-
-
-
DD
IH
Standard-mode
= 2.5 V
Min
250
with an input voltage of V
4.7
4.0
4.7
4.7
4.7
4.0
0.5
0.2
0.2
0
0
-
-
-
-
-
I
2
2
5.5
Max
C-bus and how to use it” . This brochure
C-bus
0.6
10
7
[1]
1000
Max
100
300
0.6
0.6
50
-
-
-
-
-
-
-
-
-
-
-
Min
2.0
2
V
-
-
-
C-bus/SPI interface
DD
PCA9502
Min
150
Fast-mode
1.3
0.6
0.6
0.6
1.3
0.6
0.5
0.2
0.2
© NXP B.V. 2006. All rights reserved.
0
0
-
-
-
-
-
I
= 3.3 V
2
C-bus
5.5
Max
0.8
10
Max
SS
400
300
300
7
0.6
0.6
50
[1]
-
-
-
-
-
-
-
-
-
-
-
to V
15 of 25
DD
Unit
kHz
ns
ns
ns
ns
ns
ns
Unit
V
V
pF
s
s
s
s
s
s
s
s
s
s
A
.