X96010V14IZ Intersil, X96010V14IZ Datasheet - Page 5

• Manufacturer Part Number: X96010V14IZ
• Description: IC SENSOR CONDITIONER 14-TSSOP
• Manufacturer: Intersil
• Type: Sensor Conditionerr

Specifications of X96010V14IZ

• Input Type: Voltage
• Output Type: Voltage
• Interface: 2-Wire
• Current - Supply: 15mA
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

D/A CONVERTER CHARACTERISTICS (See pg. 4 for Standard Conditions)
Notes: 1. DAC input Byte = FFh, Source or sink mode.
IFS
Offset
FSError
DNL
INL
V
V
I
I
t
TCO
OVER
UNDER
rDAC
ISink
ISource
Symbol
DAC
DAC
Iout
2. LSB is defined as
3. Offset
4. These parameters are periodically sampled and not 100% tested.
5. V(I1) and V(I2) are V
6. The maximum current, sink or source, can be set with an external resistor to 3.2 mA with a minimum V
DAC
DAC
expressed in LSB.
FSError
is expressed in LSB. The Offset
DNL
the output of the DAC, when the input changes by one code step. It is expressed in LSB. The measured values are adjusted for Offset
and Full Scale Error before calculating DNL
INL
ing the measured transfer curve for Offset and Full Scale Error. It is expressed in LSB.
age changes to 2.5V from the sourcing rail, and the current variation is <1%.
DAC
DAC
DAC
: The Integral Non-Linearity of a DAC is defined as the deviation between the measured and ideal transfer curves, after adjust-
I1 or I2 full scale current
I1 or I2 D/A converter offset error
I1 or I2 D/A converter full scale error
I1 or I2 D/A converter
Differential Nonlinearity
I1 or I2 D/A converter Integral Nonlin-
earity with respect to a straight line
through 0 and the full scale value
I1 or I2 Sink Voltage Compliance
I1 or I2 Source Voltage Compliance
I1 or I2 overshoot on D/A Converter
data byte transition
I1 or I2 undershoot on D/A Converter
data byte transition
I1 or I2 rise time on D/A Converter data
byte transition; 10% to 90%
Temperataure coefficient of output
current due to internal parameters
DAC
: The Differential Non-Linearity of a DAC is defined as the deviation between the measured and ideal incremental change in
: The Offset of a DAC is defined as the deviation between the measured and ideal output, when the DAC input is 01h. It is
: The Full Scale Error of a DAC is defined as the deviation between the measured and ideal output, when the input is FFh. It
[
CC
2
3
5
x
- 1.2V in source mode and 1.2V in sink mode. In this range the current at I1 or I2 varies <1%.
Parameter
V(VRef)
255
DAC
]
is subtracted from the measured value before calculating FSError
divided by the resistance between R1 or R2 to Vss.
DAC
.
X96010
1.56
-100
Min
-0.5
1.2
2.5
-2
-1
1
0
0
5
Typ
1.58
Vcc-1.2
Vcc-2.5
+100
Max
Vcc
Vcc
1.6
3.2
0.5
30
1
2
1
0
0
ppm/
Unit
LSB
LSB
LSB
LSB
mA
mA
µA
µA
°C
µs
V
V
V
V
See note 1, 4, 6, R = 255Ω
See note 1, 5, R = 510Ω
See notes 2 and 3.
See note 5
See note 4, 6
See note 5
See note 4, 6
DAC input byte changing from
00h to FFh and vice
versa, V(I1) and V(I2) are
Vcc - 1.2V in source mode
and 1.2V in sink mode.
See note 4.
See Figure 7.
VRMbit = “0”
Test Conditions / Notes
DAC
CC
.
= 4.5V. The compliance volt-
October 25, 2005
FN8214.1