AD9821KSTZ Analog Devices Inc, AD9821KSTZ Datasheet - Page 14

IC IMAGE SGNL PROC 12BIT 48-LQFP

AD9821KSTZ

Manufacturer Part Number
AD9821KSTZ
Description
IC IMAGE SGNL PROC 12BIT 48-LQFP
Manufacturer
Analog Devices Inc
Type
Image Sensorr
Datasheet

Specifications of AD9821KSTZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
48-LQFP
Analog Front End Type
CCD
Analog Front End Category
Video
Interface Type
Serial (3-Wire)
Sample Rate
40MSPS
Input Voltage Range
0.5V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Resolution
12b
Number Of Adc's
1
Power Supply Type
Analog/Digital
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Package Type
LQFP
Number Of Channels
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant

Available stocks

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AD9821
Internal Power-On Reset Circuitry
After power-on, the AD9821 will automatically reset all internal
registers and perform internal calibration procedures. This takes
approximately 1 ms to complete. During this time, normal clock
signals and serial write operations may occur. However, serial
register writes will be ignored until the internal reset operation
is completed.
Grounding and Decoupling Recommendations
As shown in Figure 13, a single ground plane is recommended
for the AD9821. This ground plane should be as continuous as
possible, particularly around Pins 25 through 39. This will ensure
that all analog decoupling capacitors provide the lowest possible
impedance path between the power and bypass pins and their
–14–
respective ground pins. All decoupling capacitors should be
located as close as possible to the package pins. A single clean
power supply is recommended for the AD9821, but a separate
digital driver supply may be used for DRVDD (Pin 13). DRVDD
should always be decoupled to DRVSS (Pin 14), which should
be connected to the analog ground plane. Advantages of using a
separate digital driver supply include using a lower voltage (2.7 V)
to match levels with a 2.7 V ASIC, reducing digital power
dissipation, and reducing potential noise coupling. If the
digital outputs (Pins 1–12) must drive a load larger than 20 pF,
buffering is recommended to reduce digital code transition noise.
Alternatively, placing series resistors close to the digital output
pins may also help reduce noise.
REV. 0

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