CYV15G0204RB-BGC Cypress Semiconductor Corp, CYV15G0204RB-BGC Datasheet - Page 19

IC DESERIAL HOTLINK 256LBGA

CYV15G0204RB-BGC

Manufacturer Part Number
CYV15G0204RB-BGC
Description
IC DESERIAL HOTLINK 256LBGA
Manufacturer
Cypress Semiconductor Corp
Type
Deserializerr
Datasheet

Specifications of CYV15G0204RB-BGC

Package / Case
256-LBGA Exposed Pad, 32-HLBGA
Function
Deserializer
Data Rate
1.485Gbps
Input Type
PECL
Output Type
LVTTL
Number Of Inputs
2
Number Of Outputs
2
Voltage - Supply
3.15 V ~ 3.45 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Operating Supply Voltage
3.3 V
Supply Current
700 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CYV15G0204RB-BGC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Document #: 38-02103 Rev. *C
CYV15G0204RB AC Electrical Characteristics
PLL Characteristics
Capacitance
Switching Waveforms for the CYV15G0204RB HOTLink II Receiver
Note
Receive Interface
Read Timing
RXRATEx = 0
CYV15G0204RB Reclocker Serial Output Characteristics Over the Operating Range
t
t
t
CYV15G0204RB Reclocker Output PLL Characteristics
t
t
CYV15G0204RB Receive PLL Characteristics Over the Operating Range
t
t
C
C
22. Receiver input stream is BIST data from the transmit channel. This data is reclocked and output to a wide-bandwidth digital sampling oscilloscope. The measure-
B
RISE
FALL
JRGENSD
JRGENHD
RXLOCK
RXUNLOCK
INTTL
INPECL
Parameter
Parameter
ment was recorded after 10,000 histogram hits, time referenced to REFCLKx± of the transmit channel.
RXDx[9:0]
Parameter
[14]
[14]
RXCLKx+
RXCLKx–
Parameter
[14, 22]
[14, 22]
[14]
Bit Time
CML Output Rise Time 20−80% (CML Test Load)
CML Output Fall Time 80−20% (CML Test Load)
Reclocker Jitter Generation - SD Data Rate
Reclocker Jitter Generation - HD Data Rate
Receive PLL lock to input data stream (cold start)
Receive PLL lock to input data stream
Receive PLL Unlock Rate
TTL Input Capacitance
PECL input Capacitance
Description
Description
Description
t
Description
RXCLKP
t
RXDV–
T
T
A
A
= 25°C, f
= 25°C, f
(continued)
0
0
Test Conditions
= 1 MHz, V
= 1 MHz, V
SPDSELx = HIGH
SPDSELx = MID
SPDSELx =LOW
SPDSELx = HIGH
SPDSELx = MID
SPDSELx =LOW
TRGCLKx = 27 MHz
TRGCLKx = 148.5 MHz
Condition
Condition
t
RXDV+
CC
CC
= 3.3V
= 3.3V
5128
Min.
Min.
100
180
100
180
50
50
Min.
CYV15G0204RB
Max.
Typ.
107
133
7
4
Max.
1000
1000
Max
660
270
500
270
500
Page 19 of 24
Max.
376k
376k
46
Unit
pF
pF
Unit
Unit
Unit
ps
ps
ps
ps
ps
ps
ps
ps
ps
UI
UI
UI
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