P82B715TD,112 NXP Semiconductors, P82B715TD,112 Datasheet - Page 12

IC I2C BUS EXTENDER 8-SOIC

P82B715TD,112

Manufacturer Part Number
P82B715TD,112
Description
IC I2C BUS EXTENDER 8-SOIC
Manufacturer
NXP Semiconductors
Type
Bus Extenderr
Datasheet

Specifications of P82B715TD,112

Package / Case
8-SOIC (3.9mm Width)
Tx/rx Type
I²C Logic
Delay Time
250ns
Capacitance - Input
3000pF
Voltage - Supply
4.5 V ~ 12 V
Current - Supply
22mA
Mounting Type
Surface Mount
Logic Family
P82B
Number Of Lines (input / Output)
1 / 1
Propagation Delay Time
250 ns
Operating Supply Voltage
4.5 V to 12 V
Power Dissipation
300 mW
Operating Temperature Range
- 40 C to + 85 C
Logic Type
I2C Bus Extender
Mounting Style
SMD/SMT
Number Of Input Lines
1
Number Of Output Lines
1
Output Current
60 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3981-5
935154770112
P82B715TD
P82B715TD

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P82B715TD,112
Manufacturer:
CIRRUS
Quantity:
130
NXP Semiconductors
P82B715_8
Product data sheet
Figure 10
on the P82B715 Sx/Sy I/O. Notice that the offset is small and the static levels remain
under 0.4 V. Coupling of SDA to SCL is negligible when SCL is LOW but slight
cross-coupling of SCL to SDA is visible when SDA is HIGH and therefore higher
impedance. The waveforms are very clean and will easily support all available I
masters and slaves.
Figure 11
substituted. P82B96 uses a static level offset on the slave side to isolate noise and
loadings on either side of this device. The nominal offset is 0.8 V and that V
worst-case design tolerance problems with slave devices that do not use I
switching levels, for example TTL levels. It also precludes operation with other bus buffers
using special non-compliant I
The P82B96 does not actually interfere with the operation of compliant I
down to at least 2.7 V supply or even with TTL devices (that switch around 1.4 V). It only
causes a theoretical worst case design tolerance problem because TTL devices have a
worst case 0.8 V requirement. A TTL designer must center the actual switch point
between the two specified limits, 0.8 V and 2.1 V, so in reality it cannot ever approach the
problem 0.8 V theoretical limit.
The PCA9600 is an improved version of the P82B96 offering 1 MHz operation and lower,
more closely controlled V
Fig 11. Clock and data signal output to a slave from Sx/Sy of a P82B96 replacing one of
voltage
(V)
the P82B715s
shows the I
shows the waveforms on the Sx/Sy I/O as seen by the slave when a P82B96 is
7
5
3
1
1
0
SDA
SCL
Rev. 08 — 9 November 2009
2
C-bus waveforms from the long distance line as seen by the slave
4
OL
on the Sx and Sy pins.
2
C-bus levels.
SCL
8
SDA
12
SCL
SCL
16
time ( s)
SDA
P82B715
002aad819
© NXP B.V. 2009. All rights reserved.
I
2
2
C-bus extender
C-bus devices
2
C-bus
OL
20
may create
2
C-bus
12 of 23

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