P82B715TD,112 NXP Semiconductors, P82B715TD,112 Datasheet - Page 6

• Manufacturer Part Number: P82B715TD,112
• Description: IC I2C BUS EXTENDER 8-SOIC
• Manufacturer: NXP Semiconductors
• Type: Bus Extenderr

Specifications of P82B715TD,112

• Package / Case: 8-SOIC (3.9mm Width)
• Tx/rx Type: I²C Logic
• Delay Time: 250ns
• Capacitance - Input: 3000pF
• Voltage - Supply: 4.5 V ~ 12 V
• Current - Supply: 22mA
• Mounting Type: Surface Mount
• Logic Family: P82B
• Number Of Lines (input / Output): 1 / 1
• Propagation Delay Time: 250 ns
• Operating Supply Voltage: 4.5 V to 12 V
• Power Dissipation: 300 mW
• Operating Temperature Range: - 40 C to + 85 C
• Logic Type: I2C Bus Extender
• Mounting Style: SMD/SMT
• Number Of Input Lines: 1
• Number Of Output Lines: 1
• Output Current: 60 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-3981-5; 935154770112; P82B715TD; P82B715TD

NXP Semiconductors
P82B715_8
Product data sheet
8.1.1 Pull-up resistance calculation
8.1 I
As in standard I
levels on the buffered bus. (The standard open-collector configuration is retained.) The
value and number of pull-up resistors used is flexible and depends on the system
requirements and designer preferences.
If P82B715 ICs are to be permanently connected into a system it could be configured with
only one pull-up resistor on the buffered bus and none on the I
design will be simplified, and performance improved, by fitting separate pull-ups on each
section of the bus. When a sub-system using P82B715 may be optionally connected to an
existing I
pull-ups acting in parallel with the existing I
When calculating the pull-up resistance values, the gain of the buffer introduces scaling
factors which must be applied to the system components. In practical systems the pull-up
resistance value is usually calculated to achieve the rise time requirement of the system.
As an approximation, this requirement will be satisfied for a standard 100 kHz system if
the time constant of the total system (product of the net resistance and net capacitance) is
set to 1 microsecond or less.
In systems using P82B715s, the most convenient way to achieve the total system
rise time requirement is by considering each bus node separately. Each of the I
nodes, and the buffered bus node, is designed by selecting its pull-up resistor to provide
the required rise time by setting its time constant (product of the pull-up resistance and
load capacitance) equal to the I
the system requirement will also be met with a small safety margin.
This arrangement, using multiple pull-ups as in
performance and allows stand-alone operation of individual I
extended system are disconnected or re-connected. For each bus section the pull-up
resistor for a Standard-mode system is calculated as shown in
Where: C device = sum of any connected device capacitances, and C wiring = total wiring
and stray capacitance on the bus section.
Remark: The 1 s is an approximation, with a safety factor, to the theoretical
time-constant necessary to meet the Standard-mode 1 s bus rise time specification in a
system with variable logic thresholds where the CMOS limits of 30 % and 70 % of V
apply. The actual RC requirement can be shown to be 1.18 s. For a Fast-mode system,
and the same safety margin, replace the 1 s with its 300 ns requirement.
If these capacitances cannot be measured or calculated then an approximation can be
made by assuming that each device presents 10 pF of load capacitance and 10 pF of
trace capacitance and that cables range from 50 pF to 100 pF per meter.
If only a single pull-up must be used then it must be placed on the buffered bus (as R2 in
Figure
individual bus capacitances into an equivalent capacitive loading on the buffered bus.
R
2
C-bus systems
=
---------------------------------------------------- -
C device
6) and the associated total system capacitance calculated by combining the
2
C-bus system that already has a pull-up, then the effects of the sub-system
1 s
+
2
C wiring
C-bus systems, pull-up resistors are required to provide the logic HIGH
Rev. 08 — 9 November 2009
2
C-bus rise time requirement. If each node complies, then
2
C-bus pull-up must be considered.
Figure
6, provides the best system
2
C-buses if parts of the
2
Equation
C-buses, but the system
P82B715
© NXP B.V. 2009. All rights reserved.
I
2
1:
C-bus extender
2
C-bus
CC
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