P82B96TD,112 NXP Semiconductors, P82B96TD,112 Datasheet - Page 15

IC I2C BUS BUFFER DUAL 8-SOIC

P82B96TD,112

Manufacturer Part Number
P82B96TD,112
Description
IC I2C BUS BUFFER DUAL 8-SOIC
Manufacturer
NXP Semiconductors
Type
Bufferr
Datasheet

Specifications of P82B96TD,112

Package / Case
8-SOIC (3.9mm Width)
Tx/rx Type
I²C Logic
Delay Time
5.0ns
Capacitance - Input
7pF
Voltage - Supply
2 V ~ 15 V
Current - Supply
900µA
Mounting Type
Surface Mount
Logic Family
P82B
Supply Voltage (max)
15 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
85 C
Mounting Style
SMD/SMT
Maximum Power Dissipation
300 mW
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 2
Propagation Delay Time
90 ns
Logic Type
Bus Buffer
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
OM6285 - EVAL BOARD I2C-2002-1A568-4002 - DEMO BOARD I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-3982-5
935262295112
P82B96TD
P82B96TD
NXP Semiconductors
P82B96_8
Product data sheet
Fig 15. Falling edge of SCL at master is delayed by the buffers and bus fall times
Fig 16. Rising edge of SCL at master is delayed (clock stretch) by buffer and bus rise times
V
CCM
MASTER
Effective delay of SCL at slave: 255 + 17V
C = F; V = volts.
Effective delay of SCL at master: 270 + RmCm + 0.7RbCb ns.
C = F; R = .
I
2
C-BUS
local master bus
10.1 Calculating system delays and bus clock frequency for a Fast mode
GND (0 V)
SCL
system
V
CCM
MASTER
I
2
C-BUS
Rm
Cm
master bus
capacitance
local master bus
GND (0 V)
V
CCB
Sx
SCL
P82B96
CCM
Rev. 08 — 10 November 2009
+ (2.5 + 4
Tx/Rx
Rm
buffered expansion bus
Cm
master bus
capacitance
V
CCB
Sx
10
Cb
buffered bus
wiring capacitance
Rb
9
P82B96
Tx/Rx
C
b
)V
CCB
buffered expansion bus
P82B96
+ 10V
Tx/Rx
CCS
Sx
ns.
Rb
Cb
buffered bus
wiring capacitance
Tx/Rx
Dual bidirectional bus buffer
002aab992
Rs
Cs
slave bus
capacitance
remote slave bus
SCL
© NXP B.V. 2009. All rights reserved.
I
P82B96
2
C-BUS
SLAVE
002aab991
V
CCS
15 of 32

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