PI7C8152BMAE Pericom Semiconductor, PI7C8152BMAE Datasheet - Page 11
![IC PCI-PCI BRIDGE 2PORT 160-MQFP](/photos/6/93/69398/pi7c8152bmae_sml.jpg)
PI7C8152BMAE
Manufacturer Part Number
PI7C8152BMAE
Description
IC PCI-PCI BRIDGE 2PORT 160-MQFP
Manufacturer
Pericom Semiconductor
Datasheet
1.PI7C8152AMAE.pdf
(90 pages)
Specifications of PI7C8152BMAE
Applications
*
Interface
*
Voltage - Supply
*
Package / Case
160-MQFP, 160-PQFP
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 3.6 V
Supply Current (max)
246 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PI7C8152BMAE
Manufacturer:
PERICOM
Quantity:
748
Part Number:
PI7C8152BMAE
Manufacturer:
PERICOM
Quantity:
20 000
1
INTRODUCTION
Product Description
The PI7C8152A and PI7C8152B (PI7C8152x) are Pericom Semiconductor’s PCI-to-PCI
Bridge that are designed to be fully compliant with the 32-bit, 66MHz implementation of
the PCI Local Bus Specification, Revision 2.2. The PI7C8152B supports both synchronous
and asynchronous bus transactions between devices on the Primary Bus and the Secondary
Buses operating up to 66MHz. The PI7C8152A supports synchronous transactions only.
In synchronous mode, both buses must operate at the same frequency. The Primary and
Secondary Bus can also operate in concurrent mode, resulting in added increase in system
performance.
Product Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
32-bit Primary and Secondary Ports run up to 66MHz
Compliant with the PCI Local Bus Specification, Revision 2.2
Compliant with PCI-to-PCI Bridge Architecture Specification, Revision 1.1.
Compliant with the Advanced Configuration Power Interface (ACPI) Specification.
Compliant with the PCI Power Management Specification, Revision 1.1.
Synchronous and Asynchronous operation support
Provides internal arbitration for four secondary bus masters
Supports posted write buffers in all directions
Four 128 byte FIFO’s for delay transactions
Two 128 byte FIFO’s for posted memory transactions
Enhanced address decoding
32-bit I/O address range
32-bit memory-mapped I/O address range
64-bit prefetchable address range
ISA-aware mode for legacy support in the first 64KB of I/O address range
Extended commercial temperature range 0°C to 85°C
3.3V core; 3.3V and 5V signaling
160-pin MQFP package
− All I/O and memory commands
− Type 1 to Type 0 configuration conversion
− Type 1 to Type 1 configuration forwarding
− Type 1 configuration write to special cycle conversion
− Supported modes of Asynchronous operation (PI7C8152B ONLY)
− Supported modes of Synchronous operation
− Programmable 2-level priority arbiter
− Disable control for use of external arbiter
25MHz to 66MHz
Primary
Primary
66MHz
50MHz
33MHz
25MHz
Page 11 of 90
25MHz to 66MHz
Secondary
Secondary
66MHz
50MHz
33MHz
25MHz
2-PORT PCI-TO-PCI BRIDGE
October 16, 2003 – Revision 1.11
ADVANCE INFORMATION
PI7C8152A & PI7C8152B