DS8007A-EAG+ Maxim Integrated Products, DS8007A-EAG+ Datasheet - Page 34

• Manufacturer Part Number: DS8007A-EAG+
• Description: IC INTERFACE SMART CARD 48-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS8007A-EAG+

• Applications: Smart Card
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 6 V
• Package / Case: 48-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Multiprotocol Dual Smart Card Interface
parameters continue to be used until a successful PPS
exchange is completed. The negotiated Fn, Dn values
are then used after a successful PPS exchange. If the
card comes up in specific mode (i.e., TA(2) is present
in ATR), then the indicated Fi, Di values apply immedi-
ately after successful ATR if bit 5 of the TA(2) charac-
ter is 0. If bit 5 of TA(2) is 1, implicit values should be
Table 4. Fi, Di Parameter Possibilities
RFU = Reserved for future use.
Table 5. PSC, PDR Settings to Support F, D Parameters
34
TA(1).Fi
0000
0001
0010
0011
0100
0101
0110
1001
1010
1011
1100
1101
______________________________________________________________________________________
TA(1).Fi
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0 = /31
1 = /32
PSC
0
0
0
0
0
0
0
1
1
1
1
1
1116
1488
1860
1024
1536
2048
0001
RFU
RFU
RFU
RFU
372
372
558
744
512
768
12
12
18
24
36
48
60
16
24
32
48
64
Fi
0010
12
18
24
30
12
16
24
32
6
6
9
8
MAX CLKx (MHz)
RFU
RFU
7.5
12
16
20
10
15
20
—
—
4
5
6
8
5
0011
12
15
12
16
—
3
3
6
9
4
6
8
PDR SETTING FOR Di =
used. The TA(1) character of ATR, if present, contains
the Fi and Di values indicated by the card.
Table 5 demonstrates how the prescaler (PSC) bit and
programmable divider register (PDRx) can be config-
ured to generate the requested F/D ratios. All settings
assume that the CKU bit is configured to its reset
default logic 0 state.
0100
—
—
—
—
—
3
6
2
3
4
6
8
31 x 12
31 x 12
31 x 18
31 x 24
31 x 36
31 x 48
31 x 60
32 x 16
32 x 24
32 x 32
32 x 48
32 x 64
Fi =
—
—
—
—
0101
—
—
—
—
—
—
—
3
1
2
3
4
TA(1).Di
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
0110
—
—
—
—
—
—
—
—
—
—
1
2
1000
—
—
—
—
1
1
2
3
4
5
2
4
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
16
32
12
20
Di
1
2
4
8
1001
—
—
—
—
—
—
—
—
—
—
—
3