PSD311B-70J STMicroelectronics, PSD311B-70J Datasheet - Page 32

• Manufacturer Part Number: PSD311B-70J
• Description: IC MCU PROG 256KB 5V 70NS 44PLCC
• Manufacturer: STMicroelectronics

Specifications of PSD311B-70J

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 44-PLCC
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-3691

14.0
System
Applications
(cont.)
Figure 13. PSD3XX Interface With Intel’s 80C196KB
In Figure 13, the PSD3XX is configured to work directly with Intel’s 80C196KB
microcontroller, which is a 16-bit address/16-bit data bus processor. The Address and data
lines multiplexed. The PSD3XX is configured to use PC0, PC1, PC2, and A19/CSI as logic
inputs. These signals are independent of the ALE pulse (latch-transparent). They are used
as four general-purpose inputs that take part in the PAD equations.
Port A is configured to work in Track Mode, in which (for certain conditions) PA0–PA7 tracks
lines AD0/A0–AD7/A7. Port B is configured to generate CS0–CS7. In this example, PB2
serves as a WAIT signal that slows down the 80C196KB during the access of external
peripherals. These 8-bit wide peripherals are connected to the shared bus of Port A. The
WAIT signal also drives the buswidth input of the microcontroller, so that every external
peripheral cycle becomes an 8-bit data bus cycle. PB3 and PB4 are open-drain output
signals; thus, they are pulled up externally.
GENERAL
PURPOSE
INPUTS
FOUR
+ 5V
0.1µF
NMI
RST
TxD
RxD
67
66
16
43
64
14
11
10
18
17
15
44
42
39
33
38
24
25
26
27
13
37
12
3
6
5
7
4
8
9
2
80C196KB
XTAL1
XTAL2
NMI
READY
BUSWIDTH
CDE
RESET
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P2.0/TXD
P2.1/RXD
P2.2/EXINT
P2.3/T2CLK
P2.4/T2RST
P2.5/PWM
P2.6/ T2 UP/DN
P2.7/ T2 CAPTR
HSI.0
HSI.1
HSI.2/HSO.4
HSI.3/HSO.5
VREF
VPP
ANGND
EA
V SS
V CC
+5V
68
BHE / WRH
P4.2/AD10
P4.3/AD11
P4.4/AD12
P4.5/AD13
P4.6/AD14
P4.7/AD15
WR / WRL
ALE /ADV
V SS
P3.0/AD0
P3.1/AD1
P3.2/AD2
P3.3/AD3
P3.4/AD4
P3.5/AD5
P3.6/AD6
P3.7/AD7
P4.0/AD8
P4.1/AD9
CLKOUT
HSO.0
HSO.1
HSO.2
HSO.3
36
INST
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RD
0.1µF
19
20
21
22
23
30
31
32
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
65
41
40
61
62
63
28
29
34
35
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
AD8/A8
AD9/A9
AD10/A10
AD11/A11
AD12/A12
AD13/A13
AD14/A14
AD15/A15
ADDRESS/DATA
MULTIPLEXED BUS
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
AD8/A8
AD9/A9
AD10/A10
AD11/A11
AD12/A12
AD13/A13
AD14/A14
AD15/A15
23
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
22
13
1
2
3
PSD3XX
PC0
PC1
PC2
A19/CSI
BHE /PSEN
WR / V
RD
ALE
RESET
AD0/A0
AD1/A1
AD2/A2
AD3/A3
AD4/A4
AD5/A5
AD6/A6
AD7/A7
AD8/A8
AD9/A9
AD10/A10
AD11/A11
AD12/A12
AD13/A13
AD14/A14
AD15/A15
PP
GND GND
+5V
V CC
12
44
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
AD [ 0 ..15 ]
34
21
20
19
18
17
16
15
14
11
10
9
8
7
6
5
4
0.1µF
WAIT
4.7K
PSD3XX Family
SHARED
BUS
4.7K
AD [ 0 ..15 ]
ALE
PORT 1
I/O PINS
+5V
29