HD64570F Renesas Electronics America, HD64570F Datasheet - Page 141
HD64570F
Manufacturer Part Number
HD64570F
Description
IC SCA SRL COMM ADAPTER 88QFP
Manufacturer
Renesas Electronics America
Datasheet
1.HD64570F.pdf
(469 pages)
Specifications of HD64570F
Applications
ISDN
Interface
Serial
Voltage - Supply
4.5 V ~ 5.5 V
Package / Case
88-QFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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The time constant register (TMC) specifies the value (1–256) to be loaded to the reload timer in
the internal baud rate generator (BRG). For details, see section 5.6, MSCI Baud Rate Generator.
This register is reset under either of the following conditions:
Bits 7–0 (TMC7–TMC0: Time Constant): The functions of these bits are described below.
The BRG output frequency can be calculated by the following expression:
Hardware reset
Channel reset command
Asynchronous/Byte synchronous/Bit synchronous mode
Bits 7–0 specify the value (1–256) to be loaded into the reload timer in the internal baud rate
generator. (Zero is assumed to be 256.) These bits are used in conjunction with the TXBR3–
TXBR0 bits of the TX clock source register (TXS) and the RXBR3–RXBR0 bits of the RX
clock source register (RXS) to determine the BRG output frequency for transmission and
reception.
f
f
TMC:
BR:
BRG
CLK
5.2.7
Async
Byte sync
Bit sync HDLC
Read/Write
Initial value
f
:
:
BRG
=
MSCI Time Constant Register (TMC)
Transmit (receive) BRG output frequency
System clock frequency
Value (1–256) set in TMC
Value (0–9) set in the TXBR3–TXBR0 bits of TXS, or the RXBR3–RXBR0 bits
of RXS
TMC
f
CLK
TMC7
R/W
7
0
Value loaded into the reload timer (1–256)
2
TMC6
R/W
BR
6
0
TMC5
R/W
5
0
TMC4
R/W
4
0
TMC3
R/W
3
0
Rev. 0, 07/98, page 125 of 453
TMC2
R/W
2
0
TMC1
R/W
1
0
TMC0
R/W
0
1
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