HD64570F Renesas Electronics America, HD64570F Datasheet - Page 204
HD64570F
Manufacturer Part Number
HD64570F
Description
IC SCA SRL COMM ADAPTER 88QFP
Manufacturer
Renesas Electronics America
Datasheet
1.HD64570F.pdf
(469 pages)
Specifications of HD64570F
Applications
ISDN
Interface
Serial
Voltage - Supply
4.5 V ~ 5.5 V
Package / Case
88-QFP
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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The transmitter generally transmits a break using the following procedure:
Multiprocessor Support: The MSCI supports a function which specifies whether a specific
terminal should receive or ignore data in character units. This is useful for communications
between multiple terminals.
In multiprocessor mode, a character format is used in which an MP bit is appended instead of a
parity bit. This format can be specified by the PMPM1 PMPM0 bits of MD1.
In multiprocessor mode, data should usually be transmitted with the MP bit set to 0. However, the
user can set the MP bit to 1 by issuing an MP bit on command immediately before transferring the
transmit data to the transmit buffer. This command is valid for only one data transmission after it
is issued.
On the receiver side, the MP bit in the receive data is transferred to the receive buffer together
with other status information. When the receive data is ready to be read, the value of the MP bit is
set to ST2. Data whose MP bit = 0 can be ignored (not transferred to the receive buffer) by
issuing a search MP bit command. This command is invalidated when data whose MP bit = 1 is
received, and subsequent data is received in the normal manner.
For information on the MP bit on command and search MP bit command, see section 5.2.8, MSCI
Command Register (CMD).
Figure 5.22 shows communications between multiprocessors by using the MP bit.
Rev. 0, 07/98, page 188 of 453
Waits for the end of transmission (idle status)
Writes a 1 to the BRK bit
Waits one or more character cycles
Writes a 0 to the BRK bit
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