OM13014,598 NXP Semiconductors, OM13014,598 Datasheet - Page 21

• Manufacturer Part Number: OM13014,598
• Description: LPC11U14 XPRESSO BOARD
• Manufacturer: NXP Semiconductors
• Series: LPCXpressor
• Type: MCUr

Specifications of OM13014,598

• Contents: Board
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: LPC11U14
• Other names: 568-7517

NXP Semiconductors
LPC11U1X
Objective data sheet
7.7.1 Features
7.8.1 Features
7.7 SSP serial I/O controller
7.8 I
The SSP controllers are capable of operation on a SSP, 4-wire SSI, or Microwire bus. It
can interact with multiple masters and slaves on the bus. Only a single master and a
single slave can communicate on the bus during a given data transfer. The SSP supports
full duplex transfers, with frames of 4 bits to 16 bits of data flowing from the master to the
slave and from the slave to the master. In practice, often only one of these data flows
carries meaningful data.
The LPC11U1x contain one I
The I
(SCL) and a Serial Data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver) or a transmitter with the
capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
controlled by more than one bus master connected to it.
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C-bus serial I/O controller
Maximum SSP speed of 25 Mbit/s (master) or 4.17 Mbit/s (slave) (in SSP mode)
Compatible with Motorola SPI, 4-wire Texas Instruments SSI, and National
Semiconductor Microwire buses
Synchronous serial communication
Master or slave operation
8-frame FIFOs for both transmit and receive
4-bit to 16-bit frame
The I
interface supports Fast-mode Plus with bit rates up to 1 Mbit/s.
Easy to configure as master, slave, or master/slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
The I
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C-bus is bidirectional for inter-IC control using only two wires: a Serial Clock line
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C-interface is an I
C-bus can be used for test and diagnostic purposes.
C-bus controller supports multiple address recognition and a bus monitor mode.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 11 April 2011
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C-bus compliant interface with open-drain pins. The I
C-bus controller.
32-bit ARM Cortex-M0 microcontroller
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C is a multi-master bus and can be
LPC11U1x
© NXP B.V. 2011. All rights reserved.
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C-bus
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