EA-XPR-007 Embedded Artists, EA-XPR-007 Datasheet - Page 19

• Manufacturer Part Number: EA-XPR-007
• Description: BOARD LPCXPRESSO LPC11U14
• Manufacturer: Embedded Artists

Specifications of EA-XPR-007

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC11U1X
Objective data sheet
7.2.2 Interrupt sources
7.4.1 Features
7.3 IOCON block
7.4 General Purpose Input/Output GPIO
7.5 USB interface
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
The IOCON block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals.
Peripherals should be connected to the appropriate pins prior to being activated and prior
to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is
not mapped to a related pin should be considered undefined.
Device pins that are not connected to a specific peripheral function are controlled by the
GPIO registers. Pins may be dynamically configured as inputs or outputs. Multiple outputs
can be set or cleared in one write operation.
LPC11U1x use accelerated GPIO functions:
Any GPIO pin providing a digital function can be programmed to generate an interrupt on
a level, a rising or falling edge, or both.
The Universal Serial Bus (USB) is a 4-wire bus that supports communication between a
host and one or more (up to 127) peripherals. The host controller allocates the USB
bandwidth to attached devices through a token-based protocol. The bus supports
hot-plugging and dynamic configuration of the devices. All transactions are initiated by the
host controller.
The LPC11U1x USB interface is a device controller with on-chip PHY for device functions.
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Software interrupt generation.
GPIO registers are a dedicated AHB peripheral so that the fastest possible I/O timing
can be achieved.
Entire port value can be written in one instruction.
GPIO pins can be configured as input or output by software.
All GPIO pins default to inputs with interrupt disabled at reset.
Pin registers allow pins to be sensed and set individually.
Up to eight GPIO pins can be selected from all GPIO pins to create an edge- or
level-sensitive GPIO interrupt request.
Port interrupts can be triggered by any pin or pins in each port.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 11 April 2011
32-bit ARM Cortex-M0 microcontroller
LPC11U1x
© NXP B.V. 2011. All rights reserved.
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