EA-XPR-007 Embedded Artists, EA-XPR-007 Datasheet - Page 46
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EA-XPR-007
Manufacturer Part Number
EA-XPR-007
Description
BOARD LPCXPRESSO LPC11U14
Manufacturer
Embedded Artists
Specifications of EA-XPR-007
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
NXP Semiconductors
[1]
Table 15.
T
[1]
[2]
[3]
[4]
[5]
[6]
[7]
LPC11U1X
Objective data sheet
Symbol
f
t
t
t
t
t
SCL
f
LOW
HIGH
HD;DAT
SU;DAT
amb
Applies to standard port pins and RESET pin.
See the I
Parameters are valid over operating temperature range unless otherwise specified.
tHD;DAT is the data hold time that is measured from the falling edge of SCL; applies to data in transmission and the acknowledge.
A device must internally provide a hold time of at least 300 ns for the SDA signal (with respect to the V
bridge the undefined region of the falling edge of SCL.
C
The maximum t
250 ns. This allows series protection resistors to be connected in between the SDA and the SCL pins and the SDA/SCL bus lines
without exceeding the maximum specified t
In Fast-mode Plus, fall time is specified the same for both output stage and bus timing. If series resistors are used, designers should
allow for this when considering bus timing.
=
b
= total capacitance of one bus line in pF.
40
Dynamic characteristic: I
C to +85
2
C-bus specification UM10204 for details.
10.4 I/O pins
10.5 I
Parameter
SCL clock
frequency
fall time
LOW period of the
SCL clock
HIGH period of the
SCL clock
data hold time
data set-up time
f
for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t
C.
[2]
Table 14.
T
Symbol
t
t
2
amb
r
f
C-bus
=
40
Dynamic characteristics: I/O pins
Parameter
rise time
fall time
C to +85
[4][5][6][7]
[3][4][8]
[9][10]
2
C-bus pins
All information provided in this document is subject to legal disclaimers.
f
.
C; 3.0 V
Conditions
Standard-mode
Fast-mode
Fast-mode Plus
of both SDA and SCL
signals
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
Standard-mode
Fast-mode
Fast-mode Plus
[1]
Conditions
pin configured as output
pin configured as output
Rev. 1 — 11 April 2011
Standard-mode
Fast-mode
Fast-mode Plus
V
DD
3.6 V.
[1]
Min
0
0
0
-
20 + 0.1 C
-
4.7
1.3
0.5
4.0
0.6
0.26
0
0
0
250
100
50
32-bit ARM Cortex-M0 microcontroller
Min
3.0
2.5
b
Typ
-
-
IH
(min) of the SCL signal) to
Max
100
400
1
300
300
120
-
-
-
-
-
-
-
-
-
-
-
-
LPC11U1x
© NXP B.V. 2011. All rights reserved.
5.0
5.0
Max
f
is specified at
Unit
kHz
kHz
MHz
ns
ns
ns
s
s
s
s
s
s
s
s
s
ns
ns
ns
46 of 64
Unit
ns
ns