BLKD815EPFVU Intel, BLKD815EPFVU Datasheet - Page 94

• Manufacturer Part Number: BLKD815EPFVU
• Manufacturer: Intel

Specifications of BLKD815EPFVU

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
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2.11.4 Fan Connector Current Capability
2.11.5 Power Supply Considerations
94
NOTE
AGP and PCI requirements are calculated by totaling the following:
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PS/2 Ports requirements per the IBM PS/2 Port Specification (Sept 1991):
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USB requirements are calculated by totaling the following:
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The USB ports are limited to a combined total of 700 mA.
CNR requirements are calculated as follows:
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The D815EFV and D815EPFV boards are designed to supply a maximum of 225 mA per fan
connector.
CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby
current. Failure to do so can damage the power supply. The total amount of standby current
required depends on the wake devices supported and manufacturing options. Refer to
Section 2.11.3 on page 93 for additional information.
System integrators should refer to the power usage values listed in Section 2.11.1, on page 92
when selecting a power supply for use with either the D815EFV or D815EPFV board.
Measurements account only for current sourced by either the D815EFV or D815EPFV board while
running in idle modes of the started operating systems.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the indicated
sections of the ATX form factor specification.
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For information about
The ATX form factor specification
One wake-enabled device @ 375 mA
Three non-wake-enabled devices @ 20 mA each
Keyboard @ 275 mA (Actual measurements are 220 mA-300 mA, depending on the type of
keyboard and the operational state of the keyboard’s LEDs.)
Mouse @ 70 mA
One wake-enabled device @ 500 mA
Three USB non-wake-enabled devices @ 2.5 mA each
One wake-enabled device @ 375 mA
Non-wake-enabled devices @ 20 mA
The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
The current capability of the +5 VSB line (Section 4.2.1.2)
All timing parameters (Section 4.2.1.3)
All voltage tolerances (Section 4.2.2)
Refer to
Table 4, page 19