LFXP3E-5TN100C Lattice, LFXP3E-5TN100C Datasheet - Page 295

• Manufacturer Part Number: LFXP3E-5TN100C
• Description: IC FPGA 3.1KLUTS 62I/O 100-TQFP
• Manufacturer: Lattice

Specifications of LFXP3E-5TN100C

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Another term used for I/Os is the I/O Toggle Rate or the I/O Toggle Frequency. The AF% is applicable to the PFU,
Routing and Memory Read Write Ports, etc. The activity of I/Os is determined by the signals provided by the user
(in the case of inputs) or as an output of the design (in the case of outputs). So, the rates at which I/Os toggle
define their activity. The Toggle Rate (or TR) in MHz of the output is defined as:
Toggle Rate (MHz) = 1/2 * f
Users are required to provide the TR (MHz) value for the I/O instead of providing the Frequency and AF% in case
of other resources.
The AF can be calculated for each routing resource, output or PFU, however it involves long calculations. The gen-
eral recommendation of a design occupying roughly 30% to 70% of the device is that the AF% used can be
between 15% to 25%. This is an average value that can be seen most of the design. The accurate value of an AF
depends upon clock frequency, stimulus to the design and the final output.
Ambient and Junction Temperature and Airflow
A common method of characterizing a packaged device’s thermal performance is with thermal resistance, . For a
semiconductor device, thermal resistance indicates the steady state temperature rise of the die junction above a
given reference for each watt of power (heat) dissipated at the die surface. Its units are °C/W.
The most common examples are 
tance junction-to-case (also in °C/W). Another factor is 
Knowing the reference (i.e. ambient, case or board) temperature, the power, and the relevant  value, the junction
temperature can be calculated as per following equations.
Where T
P is the total power dissipation of the device.

a high conductivity case mounted directly to a PCB or heatsink. And 
cent to the package is known.
The Power Calculator utilizes the 25°C junction temperature as its basis to calculate power, per Equation 1 above.
Users can also provide the airflow values (in LFM) and ambient temperature to get a calculated value of the junc-
tion temperature based on the power estimate.
Managing Power Consumption
One of the most critical design factors today is reducing system power consumption, especially for modern hand-
held devices and electronics. There are several design techniques that designers can use to significantly reduce
overall system power consumption. Some of these include:
JA
is commonly used with natural and forced convection air-cooled systems. 
1. Reducing operating voltage.
2. Operating within the specified package temperature limitations.
3. Using optimum clock frequency reduces power consumption, as the dynamic power is directly proportional
4. Reducing the span of the design across the device. A more closely placed design utilizes fewer routing
T
T
T
to the frequency of operation. Designers must determine if a portion of their design can be clocked at a
lower rate that will reduce power.
resources for less power consumption.
J
J
J
J
, T
= T
= T
= T
A,
A
T
C
B
C
+ 
+ 
+ 
and T
JA
JB
JC
* P
* P
* P
B
are the junction, ambient, case (or package) and board temperatures (in °C) respectively.
MAX
* AF%
(1)
(2)
(3)
JA
, thermal resistance junction-to-ambient (in °C/W) and 
12-18
JB
, thermal resistance junction-to-board (in °C/W).
for LatticeECP/EC and LatticeXP Devices
Power Estimation and Management
JB
applies when the board temperature adja-
JC
is useful when the package has
JC
, thermal resis-