MT46H4M32LFB5-5:K TR Micron Technology Inc, MT46H4M32LFB5-5:K TR Datasheet - Page 74

• Manufacturer Part Number: MT46H4M32LFB5-5:K TR
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H4M32LFB5-5:K TR

• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 110mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 37: Random WRITE Cycles
PDF: 09005aef8331b3e9
128mb_mobile_ddr_sdram_t35m.pdf - Rev. F 03/10 EN
Command
Address
DQ
DQS
CK#
DM
CK
3,4
Notes:
WRITE
Bank,
Col b
T0
1,2
1. Each WRITE command can be to any bank.
2. Programmed BL = 2, 4, 8, or 16 in cases shown.
3. D
4. b' (or x, n, a, g) = the next data-in following D
t
DQSS (NOM)
med burst order.
IN
b (or x, n, a, g) = data-in for column b (or x, n, a, g).
WRITE
Bank,
Col x
D
T1
IN
1,2
T1n
D
IN
WRITE
Bank,
Col n
T2
D
IN
1,2
74
T2n
D
IN
128Mb: x16, x32 Mobile LPDDR SDRAM
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Bank,
Col a
T3
D
IN
1,2
T3n
D
Don’t Care
IN
IN
b (x, n, a, g) according to the program-
WRITE
Bank,
Col g
T4
D
IN
1,2
T4n
D
IN
Transitioning Data
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WRITE Operation
NOP
D
T5
IN
T5n
D
IN