M29W128GL70N6E Micron Technology Inc, M29W128GL70N6E Datasheet - Page 41

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M29W128GL70N6E

Manufacturer Part Number
M29W128GL70N6E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29W128GL70N6E

Cell Type
NOR
Density
128Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
24/23Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
16M/8M
Supply Current
10mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Compliant

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6.3
6.3.1
Note:
Protection commands
Blocks can be protected individually against accidental program, erase or read operations.
The device block protection scheme is shown in
either
summary of the block protection commands.
Block protection commands are available both in 8-bit and 16-bit configuration.
The memory block and extended memory block protection is configured through the lock
register (see
The program commands referred to in the following sectons must be used according to all
the Program command timings listed here:
Enter Extended Memory Block command
The M29W128GH/L has one extra 128-word block (extended memory block) that can only
be accessed using the Enter Extended Memory Block command.
Three bus write cycles are required to issue the Extended Memory Block command. Once
the command has been issued the device enters the extended memory block mode where
all bus read or program operations are conducted on the extended memory block. Once the
device is in the extended block mode, the extended memory block is addressed by using
the addresses occupied by block 0 in the other operating modes (see
addresses).
The device remains in extended memory block mode until the Exit Extended Memory Block
command is issued or power is removed from the device. After power-up or a hardware
reset, the device reverts to read mode, and the commands issued to block 0 addresses will
properly address block 0.
The extended memory block cannot be erased, and can be treated as one-time
programmable (OTP) memory.
In extended block mode, Erase, Chip Erase, Erase Suspend and Erase Resume commands
are not allowed.
To exit from the extended memory block mode the Exit Extended Memory Block command
must be issued.
The extended memory block can be protected by setting the extended memory block
protection bit to ‘1’ (see
cannot be undone.
When the device is in the extended memory block mode, the V
for fast programming and the unlock bypass mode is not available (see
VPP/write protect
Figure 17.: Write enable controlled program waveforms (8-bit
Figure 18.: Write enable controlled program waveforms (16-bit
Figure 19.: Chip enable controlled program waveforms (8-bit
Figure 20.: Chip enable controlled program waveforms (16-bit
Table
15, or
Section 7.1: Lock
(VPP/WP)).
Table
Section 7.1: Lock
16, depending on the configuration that is being used, for a
register).
register); however once protected the protection
Figure 5: Software protection
PP
/WP pin cannot be used
mode),
mode),
mode).
mode),
Table 35: Block
Section 2.8:
scheme. See
41/94

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