SL72P4M128M8M-B05AYU STEC, SL72P4M128M8M-B05AYU Datasheet - Page 8

• Manufacturer Part Number: SL72P4M128M8M-B05AYU
• Manufacturer: STEC

Specifications of SL72P4M128M8M-B05AYU

• Main Category: DRAM Module
• Sub-category: DDR2 SDRAM
• Module Type: 240RDIMM
• Device Core Size: 72b
• Organization: 128Mx72
• Total Density: 9Gb
• Access Time (max): 600ps
• Maximum Clock Rate: 200MHz
• Operating Supply Voltage (typ): 1.8V
• Operating Current: 4.77A
• Number Of Elements: 18
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Operating Temp Range: 0C to 55C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

SL72P4M128M8M-B05AY(W)U
ABSOLUTE MAXIMUM DC RATINGS
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional Operation should be
restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods may
affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
All voltages referenced to VSS
Notes:
Symbol
VDD
VDDQ
VDDL
VIN, VOUT Voltage on any Pin Relative to VSS
TSTG
TOPR
Ta
II
IOZ
IVREF
1. Operating Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions,
2. At 0 to 85 °C, operation temperature range are the temperature which all DRAM specification will be supported.
3. At 85 to 95 °C operation temperature range, doubling refresh commands in frequency to a 32ms period ( tREFI=3.9 us )
1. VDD and VDDQ must track each other. VDDQ must be
2. VREF is expected to equal VDDQ/2 of the transmitting
please refer to JESD51.2 standard.
is required, and to enter to self refresh mode at this temperature range, an EMRS command is required to change internal
refresh rate.
less than or equal to VDD.
device and to track variations in the DC level of the same.
Peakto- peak noise (non-common mode) on VREF may
not exceed ±1percent of the DC value. Peak-to-peak AC
noise on VREF may not exceed ±2 percent of VREF (DC).
This measurement is to be taken at the nearest VREF
bypass capacitor.
Parameter
VDD Supply Voltage Relative to VSS
VDDQ Supply Voltage Relative to VSS
VDDL Supply Voltage Relative to VSS
Storage Temperature
SDRAM Device Operating Temperature (See Notes 1, 2, 3)
Ambient Operating Temperature
Input Leakage Current; Any input 0V<=VIN<=VDD;
VREF input 0V>=VIN>=0.95V; /RAS, /CAS, /WE,
(All other pins not under test = 0V)
Output Leakage Current; 0V>=VOUT>=VDDQ;
DQs and ODT are disabled
VREF Leakage Current; VREF=Valid VREF Level
Parameter
Supply Voltage
VDDL Supply Voltage
I/O Supply Voltage
I/O Reference Voltage
I/O Termination Voltage (system)
Commercial Operating Temperature
Industrial Operation Temperature
Commercial Operating Temperature
Industrial Operation Temperature
Symbol
VDDQ
VREF
VDDL
VDD
VTT
0.49 x VDDQ
VREF - 40
Min
1.7
1.7
1.7
Document Part Number 61000-02973-106 July 2007 Page 8
3. VTT is not applied directly to the device. VTT is a system
4. VDDQ tracks with VDD; VDDL tracks with VDD.
supply for signal termination resistors, is expected to be
set equal to VREF and must track variations in the DC
level of VREF.
0.50 x VDDQ
VREF
Nom
1.8
1.8
1.8
Command/Address,
DQ, DQS, /DQS
0.51 X VDDQ
VREF + 40
/S, CKE, ODT
Max
1.9
1.9
1.9
CK, /CK
240-PIN RDIMM
Units
mV
V
V
V
V
Min
-1.0
-0.5
-0.5
-0.5
-55
-40
-36
-5
-5
-5
-5
Notes
0
0
0
1
4
4
2
3
Max
100
2.3
2.3
2.3
2.3
95
85
85
55
36
5
5
5
5
Units
µA
µA
µA
µA
µA
°C
°C
°C
°C
°C
V
V
V
V