PPC405GPR-3BB400 Applied Micro Circuits Corporation, PPC405GPR-3BB400 Datasheet - Page 36

• Manufacturer Part Number: PPC405GPR-3BB400
• Manufacturer: Applied Micro Circuits Corporation

Specifications of PPC405GPR-3BB400

• Family Name: 405GPr
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/1.85V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7/1.8V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 456
• Package Type: EBGA
• Lead Free Status / Rohs Status: Not Compliant

405GPr – Power PC 405GPr Embedded Processor
Signal Functional Description
Multiplexed signals are shown in brackets following the first signal name assigned to each multiplexed ball.
Notes:
1. Receiver input has hysteresis.
2. Must pull up. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
3. Must pull down. See “Pull-Up and Pull-Down Resistors” on page 29 for recommended termination values.
4. If not used, must pull up.
5. If not used, must pull down.
6. Strapping input during reset; pull up or pull down as required.
7. Pull-up may be required. See “External Bus Control Signals” on page 29.
36
Trace Interface
GPIO5:8[TS3:6]
[TS3:6]GPIO5:8
GPIO9[TrcClk]
GPIO3[TS1O]
GPIO4[TS2O]
[TS1O]GPIO3
[TS2O]GPIO4
GPIO1[TS1E]
GPIO2[TS2E]
[TS1E]GPIO1
[TS2E]GPIO2
Signal Name
GPIO24
TestEn
TmrClk
General Purpose I/O
or
Even Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Odd Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Odd Trace execution status. To access this function, software must
toggle a DCR bit.
General Purpose I/O
or
Trace status. To access this function, software must toggle a DCR
bit.
General Purpose I/O
or
Trace interface clock. A toggling signal that is always half of the CPU
core frequency. To access this function, software must toggle a DCR
bit.
Note: Initialization strapping must hold this pin low (0) during reset.
General Purpose I/O.
Note: The pull-up initialization strapping resistor must be 1kΩ rather
than 3kΩ in order to overcome the internal pull-down resistor.
Test Enable. Used only for manufacturing tests. Pull down for normal
operation.
An external clock input that can be used to clock the timers in the
CPU core.
Even Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
Odd Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
Odd Trace execution status. To access this function, software must
toggle a DCR bit
or
General Purpose I/O.
Trace status. To access this function, software must toggle a DCR bit
or
General Purpose I/O.
(Sheet 7 of 8)
Description
I/O[O]
I/O[O]
I/O[O]
I/O[O]
I/O[O]
O[I/O]
O[I/O]
O[I/O]
O[I/O]
Revision 2.05 – March 24, 2008
I/O
I/O
I
I
Data Sheet
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
w/pull-down
w/pull-down
1.8V CMOS
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
5V tolerant
Type
Notes
1, 6
1, 6
1, 6
1, 6
1, 6
1, 6
1, 6
1, 6
1, 6
1, 6
1
AMCC