PPC405GPR-3BB400 Applied Micro Circuits Corporation, PPC405GPR-3BB400 Datasheet - Page 48

• Manufacturer Part Number: PPC405GPR-3BB400
• Manufacturer: Applied Micro Circuits Corporation

Specifications of PPC405GPR-3BB400

• Family Name: 405GPr
• Device Core: PowerPC
• Device Core Size: 32b
• Frequency (max): 400MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.8/1.85V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7/1.8V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 456
• Package Type: EBGA
• Lead Free Status / Rohs Status: Not Compliant

405GPr – Power PC 405GPr Embedded Processor
I/O Specifications—Group 1
Notes:
1. PCI timings are for operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
3. For PCI, I/O H is specified at 0.9OV
48
Internal Peripheral Interface
IICSCL
IICSDA
UART0_CTS
UART0_DCD
UART0_DSR
UART0_DTR
UART0_RI
UART0_RTS
UART0_Rx
UART0_Tx
UART1_RTS/
UART1_DTR
UART1_DSR/
UART1_CTS
UART1_Rx
UART1_Tx
UARTSerClk
Interrupts Interface
IRQ0:6[GPIO17:23]
JTAG Interface
TCK
TDI
TDO
TMS
TRST
System Interface
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO24
Halt
SysClk
SysErr
SysReset
TestEn
TmrClk
In synchronous mode, timing is relative to SysClk. In asynchronous mode, timing is relative to PCIClk.
and I/O L is specified at 0.4 V.
Signal
Setup Time
(T
IS
na
na
na
na
na
na
na
na
na
na
dc
dc
dc
min)
Input (ns)
Hold Time
(T
DD
IH
na
na
na
na
na
na
na
na
na
na
dc
dc
dc
(Sheet 2 of 3)
and I/O L is specified at 0.1OV
min)
Valid Delay
(T
OV
na
na
na
na
na
na
na
na
na
10
na
na
max)
Output (ns)
Hold Time
(T
OH
na
na
na
na
na
na
na
na
na
na
na
1
min)
DD
. For all other interfaces, I/O H is specified at 2.4 V
Output Current (mA)
(min)
I/O H
15.3
15.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
10.3
na
na
na
na
na
na
na
na
na
na
na
Revision 2.05 – March 24, 2008
(min)
I/O L
10.2
10.2
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
7.1
na
na
na
na
na
na
na
na
na
na
na
Data Sheet
Clock
Notes
async
async
async
async
async
async
async
async
async
async
AMCC