MT48LC2M32B2P-7:GTR Micron Technology Inc, MT48LC2M32B2P-7:GTR Datasheet - Page 66
MT48LC2M32B2P-7:GTR
Manufacturer Part Number
MT48LC2M32B2P-7:GTR
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC2M32B2P-7GTR.pdf
(69 pages)
Specifications of MT48LC2M32B2P-7:GTR
Lead Free Status / Rohs Status
Compliant
- Current page: 66 of 69
- Download datasheet (3Mb)
Figure 48:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
COMMAND
BA0, BA1
DQM 0-3
A0-A9
CLK
CKE
A10
DQ
WRITE – Full-Page Burst
t CKS
t CMS
t AS
t AS
t AS
Notes:
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. A8 and A9 = “Don’t Care.”
2.
3. Page left open; no
t CL
t
T1
WR must be satisfied prior to PRECHARGE command.
NOP
t CH
t CMS
t CK
t DS
COLUMN m 1
BANK
T2
WRITE
D
IN
t CMH
t DH
m
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
66
t DS
D
IN
T4
NOP
256 locations within same row
m + 2
t DH
Full page completed
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DS
D
IN
T5
NOP
m + 3
t DH
(
(
(
(
(
(
)
(
)
(
)
(
)
(
)
(
(
(
)
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)
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)
(
)
(
(
(
(
(
(
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(
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(
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(
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)
)
(
)
(
(
)
(
(
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)
)
)
t DS
Tn + 1
D
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
BURST TERM
Timing Diagrams
Tn + 2
DON’T CARE
UNDEFINED
2, 3
Tn + 3
NOP
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