MT48LC16M16A2P-75:DTR Micron Technology Inc, MT48LC16M16A2P-75:DTR Datasheet - Page 70

• Manufacturer Part Number: MT48LC16M16A2P-75:DTR
• Manufacturer: Micron Technology Inc

Specifications of MT48LC16M16A2P-75:DTR

• Lead Free Status / Rohs Status: Compliant

Figure 40: READ With Auto Precharge Interrupted by a WRITE
PDF: 09005aef8091e6d1
256Mb_sdr.pdf - Rev. N 1/10 EN
Internal
States
Command
Note:
Address
Bank m
Bank n
DQM
CLK
DQ
1
1. DQM is HIGH at T2 to prevent D
active
Page
READ - AP
Bank n,
Bank n
T0
Col a
READ with burst of 4
Page active
NOP
CL = 3 (bank n)
T1
T2
NOP
70
T3
D
NOP
OUT
OUT
a + 1 from contending with D
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WRITE - AP
Bank m,
Col d
T4
Bank m
D
Interrupt burst, precharge
IN
WRITE with burst of 4
Transitioning data
T5
NOP
256Mb: x4, x8, x16 SDRAM
D
t
RP - bank n
IN
PRECHARGE Operation
T6
NOP
D
IN
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IN
d at T4.
T7
NOP
D
t WR - bank m
Don’t Care
IN
Write-back
Idle