LH28F800BVE-BTL90 Sharp Electronics, LH28F800BVE-BTL90 Datasheet - Page 37

• Manufacturer Part Number: LH28F800BVE-BTL90
• Manufacturer: Sharp Electronics

Specifications of LH28F800BVE-BTL90

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 20/19Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 1M/512K
• Supply Current: 30mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

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Flash memory LHFXXVXX family Data Protection
Noises having a level exceeding the limit specified in this document may be generated under specific
operating conditions on some systems.
Such noises, when induced onto WE# signal or power supply, may be interpreted as false commands, causing
undesired memory updating.
To protect the data stored in the flash memory against unwanted overwriting, systems operating with the flash
memory should have the following write protect designs, as appropriate:
1) Protecting data in specific block
2) Data protection through V
3) Data protection through RP#
4) Noise rejection of WE#
By setting a WP# to low, only the boot block can be protected against overwriting.
Parameter and main blocks cannot be locked.
System program, etc. , can be locked by storing them in the boot block.
When a high voltage is applied to RP#, overwrite operation is enabled for all blocks.
For further information on controlling of WP# and RP#, refer to the chapter 4.10.
When the level of V
disabled. All blocks are locked and the data in the blocks are completely write protected.
For the lockout voltage, refer to the chapter 4.10 and 6.2.3.
When the RP# is kept low during power up and power down sequence such as voltage transition, write
operation on the flash memory is disabled, write protecting all blocks.
For the details of RP# control, refer to the chapter 5.6 and 6.2.7.
Consider noise rejection of WE# in order to prevent false write command input.
PP
is lower than V
PP
PPLK
(lockout voltage), write operation on the flash memory is