LH28F400SUE-NC80 Sharp Electronics, LH28F400SUE-NC80 Datasheet - Page 16

• Manufacturer Part Number: LH28F400SUE-NC80
• Manufacturer: Sharp Electronics

Specifications of LH28F400SUE-NC80

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 80ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 60mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

LH28F400SU-NC
16
READ COMPATIBLE
STATUS REGISTER
CHECK IF DESIRED
CSR FULL STATUS
CSR FULL STATUS CHECK PROCEDURE
RETRY/ERROR
CLEAR CSRD
OPERATION
READ CSRD
RECOVERY
WRITE A7H
WRITE D0H
COMPLETE
(see above)
CSR.4, 5 =
CSR.7 =
CSR.3 =
(NOTE)
(NOTE)
START
1
0
1
Figure 12. Erase All Unlocked Blocks with Compatible Status Registers
1
0
0
SUCCESSFUL
SUSPEND
ERASE
V
DETECT
ERASE
PP
NO
LOW
ERASE LOOP
SUSPEND
YES
CSR Full Status Check can be done after Erase All Unlocked
Block, or after a sequence of Erasures.
Write FFH after the last operation to reset
device to read array mode.
See Command Bus Cycle notes for description of codes.
NOTE:
Where power off or RP is set low during erase operation,
1. Clear CSR.3/4/5 and issue Reset WP command,
2. Retry Erase All Unlocked Block Erase command to
3. Set WP command is issued, if necessary.
CSR.3, 4, 5 should be cleared, if set, before further attempts
are initiated.
NOTE:
If CSR.3 (VPPS) is set to '1', after clearing CSR.3/4/5,
1. Issue Reset WP command,
2. Retry Erase All Unlocked Block Erase command to erase
3. Set WP command is issued, if necessary.
If CSR.3 (VPPS) is set to '0', after clearing CSR.3/4/5,
1. Retry Erase All Unlocked Block Erase command.
OPERATION
OPERATION
erase all blocks, or issue Single Block Erase to
erase all of the unlocked blocks in sequence.
Standby
Standby
all blocks, or issue Single Block Erase to erase all of the
unlocked blocks in sequence.
Standby
Write
Write
Read
BUS
BUS
4M (512K × 8, 256K × 16) Flash Memory
COMMAND
COMMAND
Unlocked
Erase All
Confirm
Blocks
D = A7H
A = X
D = D0H
A = X
Q = CSRD
Toggle CE or OE
to update CSRD
A = X
Check CSR.7
1 = WSM Ready
0 = WSM Busy
Check CSR.4, 5
1 = Erase Error
0 = Erase Successful
Both 1 = Command
Sequence Error
Check CSR.3
1 = V
0 = V
PP
PP
COMMENTS
COMMENTS
Low Detect
OK
28F400SUT-NC60-10