LH28F400SUE-NC80 Sharp Electronics, LH28F400SUE-NC80 Datasheet - Page 9

• Manufacturer Part Number: LH28F400SUE-NC80
• Manufacturer: Sharp Electronics

Specifications of LH28F400SUE-NC80

• Cell Type: NOR
• Density: 4Mb
• Access Time (max): 80ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 19/18Bit
• Operating Supply Voltage (typ): 5V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP-I
• Program/erase Volt (typ): 4.5 to 5.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 512K/256K
• Supply Current: 60mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

4M (512K × 8, 256K × 16) Flash Memory
Compatible Status Register
4M FLASH MEMORY
SOFTWARE ALGORITHMS
Overview
formance Enhancement commands and Status Regis-
ters, the software code required to perform a given
operation may become more intensive but it will result
in much higher write/erase performance compared with
current flash memory architectures.
eration proceeds are shown here. Figures 4 through 6
depict flowcharts using the 2nd generation flash device
in the LH28F008SA-compatible mode. Figures 7 through
12 depict flowcharts using the 2nd generation flash
device’s performance enhancement commands mode.
RP
Byte Write, Two Byte Serial Write and Block Erase can
not be performed in each block. However, at that time,
Erase All Unlocked Block is performed normally, if used,
and reflect actual lock status, also the unlocked block
data is erased. When the device power-up or the device
is reset by RP
written to reflect actual block lock status.
fore Write Block Lock command. To reflect actual block
lock status, Set Write Protect command is succeeded.
CSR.7 = WRITE STATE MACHINE STATUS (WSMS)
CSR.6 = ERASE-SUSPEND STATUS (ESS)
CSR.5 = ERASE STATUS (ES)
CSR.4 = DATA-WRITE STATUS (DWS)
CSR.3 = V
With the advanced Command User Interface, its Per-
The software flowcharts describing how a given op-
When the device power-up or the device is reset by
Reset Write Protect command must be written be-
»
WSMS
pin, all blocks come up locked. Therefore, Word/
7
1 = Ready
0 = Busy
1 = Erase Suspended
0 = Erase in Progress/Completed
1 = Error in Block Erasure
0 = Successful Block Erase
1 = Error in Data Write
0 = Data Write Successful
1 = V
0 = V
PP
»
pin, Set Write Protect command must be
STATUS (VPPS)
PP
PP
Low Detect, Operation Abort
OK
ESS
6
ES
5
DWS
4
NOTES:
1. RY
2. If DWS and ES are set to ‘1’ during an erase attempt, an
3. The VPPS bit, unlike an A/D converter, does not provide
4. CSR.2 - CSR.0 = Reserved for further enhancements.
determine which blocks are locked. In order to see Lock
Status of a certain block, a Word/Byte Write command
(WA = Block Address, WD = FHH) is written to the CUI,
after issuing Set Write Protect command. If CSR.7,
CSR.5 and CSR.4 (WSMS, ES and DWS) are set to
'1’s, the block is locked. If CSR.7 is set to '1', the block is
not locked.
operation to each block.
lock information is also erased. Block Lock command
and Set Write Protect command must be written to pro-
hibit Write/Erase operation to each block.
mended that the customer use any command other than
the valid commands specified in “Command Bus Defi-
nitions”. Sharp reserved the right to redefine these codes
for future functions.
which has already been programmed 0. Overwrite op-
eration may generate unerasable bit. In case of repro-
gramming 0 to the Byte data which has been pro-
grammed 1.
• Program 0 for the bit in which you want to change
• Program 1 for the bit which has already been pro-
10111100 requires 11111110 programming.
VPPS
completion of an operation (Erase Suspend, Erase or Data
Write) before the appropriate Status bit (ESS, ES or DWS)
is checked for success.
improper command sequence was entered. Clear the CSR
and attempt the operation again.
continuous indication of V
V
sequences have been entered, and informs the system if
V
report accurate feedback between V
These bits are reserved for future use and should be
masked out when polling the CSR.
The Compatible Status Register (CSR) is used to
Reset Write Protect command enables Write/Erase
In the case of Block Erase is performed, the block
There are unassigned commands. It is not recom-
Please do not execute reprogramming 0 for the bit
data from 1 to 0.
grammed 0.
For example, changing Byte data from 10111101 to
3
PP
PP
»
/ BY
’s level only after the Data-Write or Erase command
has not been switched on. VPPS is not guaranteed to
»
output or WSMS bit must be checked to determine
R
2
PP
level. The WSM interrogates
R
1
PPL
and V
LH28F400SU-NC
PPH
.
R
0
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