PA28F800BVT120 Intel, PA28F800BVT120 Datasheet

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... Block. Reference Smart 3 Advanced Boot Block 4-Mbit, 8-Mbit, 16-Mbit Flash Memory Family datasheet, order number 290580. For new designs with this device, Intel recommends using the 8-Mbit Smart 5 Boot Block. Reference CC Smart 5 Flash Memory Family Mbit datasheet, order number 290599. These documents are also available at Intel’s website, http://www.intel.com/design/flcomp. ...

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... Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P ...

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... AC Characteristics—Read Only Operations—Extended Temperature .........51 4.13 AC Characteristics—WE# Controlled Write Operations— Extended Temperature ........53 4.14 AC Characteristics—CE# Controlled Write Operations— Extended Temperature ........55 4.15 Extended Temperature Operations—Erase and Program Timings ................................56 5.0 ORDERING INFORMATION..........................57 6.0 ADDITIONAL INFORMATION .......................58 Related Intel Information ..................................58 PAGE 3 ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY REVISION HISTORY Number -001 Initial release of datasheet, no specifications included -002 Explanation of WP# on 44-lead PSOP added; AC/DC Specifications added, including BE product text and 2.7 V specifications. -003 Applying V voltages (Sections 5.1 and 6.1) rewritten for clarity. ...

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... FlashFile™ memory). Also, the term “2.7 V” generally means the full voltage range 2.7 V–3.6 V. Section 1.0 provides an overview of the flash memory family including applications, pinouts and descriptions ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 1.2 Main Features Intel’s SmartVoltage technology is the most flexible voltage solution in the flash industry, providing two discrete voltage supply pins operation, and V for program and erase PP operation. Discrete supply pins allow system designers to use the optimal voltage levels for their design ...

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... Kbytes each for frequently updated data storage and diagnostic messages (e.g., phone high- numbers, authorization codes). Intel’s boot block architecture provides a flexible solution for the different design needs of various applications. The asymmetrically-blocked memory map allows the integration of several memory components into a single flash device. The boot block provides a secure boot PROM ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 1.4 Pinouts Intel’s SmartVoltage Boot Block architecture provides pinout upgrade paths to the 8-Mbit density. 8-Mbit pinouts are given on the chip illustration in the center, with 2-Mbit and 4-Mbit pinouts going outward from the center for reference. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F400 28F200 WP# WP CE# CE# CE# GND GND 13 GND OE# OE NOTE: Pin and 4-Mbit devices but A on the 8-Mbit because no other pins were available for the high order address. 18 Thus, the 8-Mbit in the 44-lead PSOP cannot unlock the boot block without RP from 2/2 Mbit in this package, design pin 2 to control WP# at the 2/4 Mbit level and A for details ...

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... WE# cycle during a Program command. Inputs commands to the Command User Interface when CE# and WE# are active. Data is internally latched during the Write cycle. Outputs array, intelligent identifier and status register data. The data pins float to tri-state when the chip is de-selected or the outputs are disabled. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Table 2. 28F800/008B Pin Descriptions (Continued) Symbol Type WP# INPUT WRITE PROTECT: Provides a method for unlocking the boot block in a system without supply. When WP logic low, the boot block is locked, preventing program and erase operations to the boot block program or erase ...

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... EEPROM. By using software techniques, the byte- rewrite functionality of EEPROMs can be emulated. These techniques are detailed in Intel’s application note, AP-604 Using Intel’s Boot Block Flash Memory Parameter Blocks to Replace EEPROM . Each boot block component contains two parameter blocks of 8 Kbytes (8,192 bytes) each. The parameter blocks are not write-protectable ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F800-B 7FFFFH 128-Kbyte MAIN BLOCK 70000H 6FFFFH 128-Kbyte MAIN BLOCK 60000H 5FFFFH 128-Kbyte MAIN BLOCK 50000H 4FFFFH 128-Kbyte MAIN BLOCK 40000H 3FFFFH 128-Kbyte MAIN BLOCK 30000H 2FFFFH 128-Kbyte MAIN BLOCK 20000H 1FFFFH 128-Kbyte MAIN BLOCK ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F800-T FFFFFH 16-Kbyte BOOT BLOCK FC000H FBFFFH 8-Kbyte PARAMETER BLOCK FA000H F9FFFH 8-Kbyte PARAMETER BLOCK F8000H F7FFFH 96-Kbyte MAIN BLOCK E0000H DFFFFH 128-Kbyte MAIN BLOCK C0000H BFFFFH 128-Kbyte MAIN BLOCK A0000H 9FFFFH 128-Kbyte MAIN BLOCK ...

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... V allows write and erase of the device. All PP functions associated with altering memory contents: Program and Erase, Intelligent Identifier Read, and Read Status are accessed via the CUI. The internal Write State Machine (WSM) completely automates program and erase, beginning operation signaled by the CUI and reporting status through the status register ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Table 3. Bus Operations for Word-Wide Mode (BYTE Mode Notes RP# Read 1,2 Output Disable V IH Standby V IH Deep Power-Down Intelligent Identifier (Mfr.) Intelligent Identifier 4 (Device) Write 6,7 Table 4. Bus Operations for Byte-Wide Mode (BYTE Mode Notes RP# CE# ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 3.2.2 INTELLIGENT IDENTIFIERS To read the manufacturer and device codes, the device must be in intelligent identifier read mode, which can be reached using two methods: by writing the Intelligent Identifier command (90H taking the A pin Once in intelligent ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Table 6. Command Codes and Descriptions Code Device Mode 00 Invalid/ Unassigned commands that should not be used. Intel reserves the right to Reserved redefine these codes for future functions. FF Read Array Places the device in read array mode, so that array data will be output on the data pins ...

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... SRD - Data read from status register. 4. IID = Intelligent Identifier Data. Following the Intelligent Identifier command, two read operations access manufacturer and device codes Address within the block being erased Address to be programmed Data to be programmed at location PA. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Table 8. Status Register Bit Definition WSMS ESS SR.7 WRITE STATE MACHINE STATUS 1 = Ready (WSMS Busy SR.6 = ERASE-SUSPEND STATUS (ESS Erase Suspended 0 = Erase In Progress/Completed SR.5 = ERASE STATUS (ES Error In Block Erasure 0 = Successful Block Erase SR.4 = PROGRAM STATUS (DWS) ...

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... The status register should be cleared before attempting the next operation. Any CUI instruction can follow after programming however, reads from the memory array or intelligent identifier cannot be accomplished until the CUI is given the appropriate command. 3.3.4 ERASE MODE To erase a block, write the Erase Set-Up and Erase Confirm commands to the CUI, along with the addresses identifying the block to be erased ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 3.3.4.1 Suspending and Resuming Erase Since an erase operation requires on the order of seconds to complete, an Erase Suspend command is provided to allow erase-sequence interruption in order to read data from another block of the memory. Once the erase sequence is started, writing the Erase Suspend command to the CUI requests that the WSM pause the erase sequence at a predetermined point in the erase algorithm ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Start Write 40H, Word/Byte Address Write Word/Byte Data/Address Read Status Register NO SR YES Full Status Check if Desired Word/Byte Program Complete FULL STATUS CHECK PROCEDURE Read Status Register Data (See Above Range Error Word/Byte Program SR ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Start Write 20H, Block Address Write D0H and Block Address Read Status Register Suspend Erase Loop NO 0 YES Suspend SR.7 = Erase 1 Full Status Check if Desired Block Erase Complete FULL STATUS CHECK PROCEDURE Read Status Register ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Start Write B0H Write 70H Read Status Register 0 SR SR.6 = Erase Completed 1 Write FFH Read Array Data Done No Reading Yes Write D0H Write FFH Erase Resumed Read Array Data Figure 8. Erase Suspend/Resume Flowchart SEE NEW DESIGN RECOMMENDATIONS ...

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... CPU initialization would not occur because the flash memory may be providing status information instead of array data. Intel’s Flash memories allow proper CPU initialization following a system reset by connecting the RP# pin to the same RESET# signal that resets the system CPU. ...

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... CUI must be reset to read array mode PPLK via the Read Array command if accesses to the flash memory are desired. Please refer to Intel’s application note AP-617 Additional Flash Data Protection Using V and WP#, for a circuit-level description of how to implement the protection discussed in Section 3.6. ...

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... NOTICE: This datasheet contains preliminary information on new products in production. Do not finalize a design with this information. Revised information will be published when the product is available. Verify with your local Intel Sales office that you have the latest datasheet before finalizing a design. * WARNING: Stressing the device beyond the "Absolute Maximum Ratings" ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.2.1 APPLYING V CC VOLTAGES When applying V voltage to the device, a delay CC may be required before initiating device operation, depending on the V ramp rate slower than 1V/100 µs (0.01 V/µs) then no delay is V Ramp Rate CC 1V/100 s No delay required. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.4 DC Characteristics—Commercial Prod Sym Parameter V CC Notes I Input Load Current Output Leakage 1 LO Current I V Standby Current 1,3 CCS Deep 1 CCD CC Power-Down Current V Read Current for I 1,5,6 CC CCR Word or Byte V Program Current I 1,4 ...

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... Word or Byte I V Erase Current 1,4 PPE PP V Erase PPES Suspend Current RP# Boot Block I 1,4 RP# Unlock Current A Intelligent I 1 Identifier Current SEE NEW DESIGN RECOMMENDATIONS (Continued) BV-70 BV-120 3.3 ± 0 ± 10% Units Typ Max Typ Max ± 0.5 ± 15 ± 0.5 ± ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.4 DC Characteristics—Commercial Sym Parameter V A Intelligent Identifier Voltage Input Low Voltage IL V Input High Voltage IH V Output Low Voltage Output High Voltage (TTL Output High Voltage (CMOS Lock-Out Voltage PPLK (Prog/Erase Operations) PP PPH ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 3.0 INPUT 1.5 0.0 NOTE: AC test inputs are driven for a logic “1” and 0.0 V for a logic “0.” Input timing begins, and output timing ends, at 1.5 V. Input rise and fall times (10%–90%) <10 ns. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.5 AC Characteristics—Read Only Operations—Commercial Symbol Parameter t Read Cycle Time AVAV t Address to Output Delay AVQV t CE# to Output Delay ELQV t RP# to Output Delay PHQV t OE# to Output Delay GLQV t CE# to Output in Low Z ELQX t CE# to Output in High Z ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.5 AC Characteristics—Read Only Operations—Commercial ( Sym Parameter t Read Cycle Time AVAV t Address to Output Delay AVQV t CE# to Output Delay ELQV t RP# to Output Delay PHQV t OE# to Output Delay GLQV t CE# to Output in Low Z ELQX t CE# to Output in High Z ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY Device and Address Selection V IH ADDRESSES (A) Address Stable CE# ( OE# ( WE# ( High Z DATA (D/ RP#(P) t PHQV V IL Figure 12. AC Waveforms for Read Operations Standby Address Selection V IH ADDRESSES ( CE# ( OE# (G) t ELFL BYTE# ( High Z DATA (D/Q) (DQ0-DQ7) ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.6 AC Characteristics— WE#–Controlled Write Operations Symbol Parameter t Write Cycle Time AVAV t RP# Setup to WE# Going Low PHWL t CE# Setup to WE# Going Low ELWL t Boot Block Lock Setup to WE# PHHWH Going High V Setup to WE# Going High ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.6 AC Characteristics— WE#–Controlled Write Operations (Continued) Sym Parameter t Write Cycle Time AVAV t RP# Setup to WE# Going Low PHWL t CE# Setup to WE# Going Low ELWL t Boot Block Lock Setup to WE# Going PHHWH High V Setup to WE# ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY NOTES: 1. Read timing characteristics during write and erase operations are the same as during read-only operations. Refer to AC Characteristics during read mode. 2. The on-chip WSM completely automates program/erase operations; program/erase algorithms are now controlled internally which includes verify and margining operations ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.7 AC Characteristics— CE#–Controlled Write Operations Symbol Parameter t Write Cycle Time AVAV t RP# High Recovery to CE# PHEL Going Low t WE# Setup to CE# Going Low WLEL t Boot Block Lock Setup to CE# PHHEH Going High V Setup to CE# Going High ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.7 AC Characteristics— CE#–Controlled Write Operations (Continued) Sym Parameter t Write Cycle Time AVAV t RP# High Recovery to CE# Going Low PHEL t WE# Setup to CE# Going Low WLEL t Boot Block Lock Setup to CE# Going PHHEH High ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY ADDRESSES ( AVAV IH WE# ( WLEL V IH OE# ( EHEL V IH CE# ( High Z DATA (D/ PHEL RP PPH V 1 PPH V ( PPLK V IL NOTES Power-Up and Standby Write program or Erase Setup Command. 3. Write Valid Address and Data (Program) or Erase Confirm Command. ...

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... Typical conditions are +25 °C with V and 5 12.0 V typically results in a 60% reduction in programming time Contact your Intel representative for information regarding maximum byte/word program specifications. SEE NEW DESIGN RECOMMENDATIONS 5 V ± 10 ± 5% 3.3 ± 0 ± 10% 3.3 ± 0.3 V Typ Max Typ Max ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.9 Extended Operating Conditions Table 11. Extended Temperature and V Symbol Parameter T Operating Temperature A V 2.7V–3.6V V Supply Voltage CC CC 3.3V V Supply Voltage (± 0.3V Supply Voltage (10%) CC NOTES specifications are valid at both voltage ranges. See DC Characteristics tables for voltage range-specific specifications. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.11 DC Characteristics—Extended Temperature Operation Prod TBE-120 Sym Parameter V 2.7 V–3 Notes Typ Max I Input Load 1 ± 1.0 IL Current I Output 1 ± Leakage Current V I 1,3 50 110 CC CCS Standby Current 0.4 1.5 V Deep I 1 0.2 ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.11 DC Characteristics—Extended Temperature Operation Prod TBE-120 Sym Parameter V 2.7V–3.6V CC Notes Typ Max CCW Program Current for Word Byte V Erase I 1 CCE Current Erase I 1,2 2.5 8.0 CC CCES Suspend Current ± 5 ± 15 ...

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... V Erase 200 PP PPES Suspend Current I RP# Boot 1,4 500 RP# Block Unlock Current A I 1,4 500 9 ID Intelligent Identifier Current SEE NEW DESIGN RECOMMENDATIONS (Continued) TBV-90 TBV-90 TBE-120 3.3 ± 0 ± 10% Unit Test Conditions Typ Max Typ Max Block Erase in Progress ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.11 DC Characteristics—Extended Temperature Operation Prod TBE-120 Sym Parameter V 2.7 V–3 Notes Min Max A V 11.4 12 Intelligent Identifier Voltage V Input Low –0.5 0.8 IL Voltage V V Input High 2 ± Voltage 0.5V V Output Low 0.45 OL Voltage ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY NOTES: 1. All currents are in RMS unless otherwise noted. Typical values at V product versions (packages and speeds specified with device de-selected. If device is read while in erase suspend, current draw is sum of I CCES 3. Block erases and word/byte programs inhibited when V V ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 2.7 INPUT 1.35 0.0 NOTE: AC test inputs are driven at 2.7 V for a logic “1” and 0.0 V for a logic “0.” Input timing begins, and output timing ends, at 1.35 V. Input rise and fall times (10%–90%) <10 ns. ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.12 AC Characteristics—Read Only Operations Sym Parameter t Read Cycle Time AVAV t Address to Output Delay AVQV t CE# to Output Delay ELQV t RP# to Output Delay PHQV t OE# to Output Delay GLQV t CE# to Output in Low Z ELQX t CE# to Output in High Z ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY NOTES: 1. See AC Input/Output Reference Waveform for timing measurements. 2. OE# may be delayed –t after the falling edge of CE# without impact Sampled, but not 100% tested BYTE# switching low to valid output delay will be equal to t FLQV 5. See Test Configuration (Figure 19), 2.7 V– ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.13 AC Characteristics—WE# Controlled Write Operations Extended Temperature Sym Parameter t Write Cycle Time AVAV t RP# High Recovery to WE# PHWL Going Low t CE# Setup to WE# Going Low ELWL t Boot Block Lock Setup to WE# PHHWH Going High ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.13 AC Characteristics—WE# Controlled Write Operations Extended Temperature (Continued) Sym Parameter V Hold from Valid SRD t PP QVVL RP# V Hold from Valid SRD t HH QVPH t Boot-Block Lock Delay PHBR NOTES: 1. Read timing characteristics during program and erase operations are the same as during read-only operations. Refer to AC Characteristics during read mode. 2. The on-chip WSM completely automates program/erase operations ...

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... SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 4.14 AC Characteristics—CE# Controlled Write Operations Extended Temperature Sym Parameter t Write Cycle Time AVAV t RP# High Recovery to CE# PHEL Going Low t WE# Setup to CE# Going Low WLEL t Boot Block Lock Setup to CE# PHHEH Going High ...

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... PP 3. Typical conditions are +25 °C with V and 5 12.0 V typically results in a 60% reduction in programming time Contact your Intel representative for information regarding maximum byte/word program specifications. 56 SEE NEW DESIGN RECOMMENDATIONS 12 V ± ± 10% 2.7 V–3.6 V 3.3 ± 0.3 V Max Typ Max Typ ...

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... Access Speed (ns) BV/CV: V BE/CE Top Boot B = Bottom Boot Voltage Options ( 3 2 Architecture B = Boot Block C = Compact 48-Lead TSOP 44-Lead PSOP 48-Lead TSOP PA28F800BVT70 E28F800CVT70 PA28F800BVB70 E28F800CVB70 PA28F800BVT120 PA28F800BVB120 TB28F800BVT90 TE28F800CVT90 TB28F800BVB90 TE28F800CVB90 TE28F800CET120 TE28F800CEB120 Summary of Line Items V Package ± ± 40-Ld 44-Ld 48-Ld ...

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... Specification Update NOTES: 1. Please call the Intel Literature Center at (800) 548-4725 to request Intel documentation. International customers should contact their local Intel or distribution sales office. 2. Visit Intel’s World Wide Web home page at http://www.Intel.com for technical documentation and tools. ...