PA28F800BVT120 Intel, PA28F800BVT120 Datasheet - Page 22

• Manufacturer Part Number: PA28F800BVT120
• Manufacturer: Intel

Specifications of PA28F800BVT120

• Density: 8Mb
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 20/19Bit
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temp Range: 0C to 70C
• Package Type: SOP
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 5.5V
• Word Size: 8/16Bit
• Number Of Words: 1M/512K
• Supply Current: 65mA
• Mounting: Surface Mount
• Pin Count: 44
• Lead Free Status / Rohs Status: Not Compliant

8-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY
3.3.4.1
Since an erase operation requires on the order of
seconds to complete, an Erase Suspend command
is provided to allow erase-sequence interruption in
order to read data from another block of the
memory. Once the erase sequence is started,
writing the Erase Suspend command to the CUI
requests that the WSM pause the erase sequence
at a predetermined point in the erase algorithm. The
status register will indicate if/when the erase
operation has been suspended.
At this point, a Read Array command can be written
to the CUI in order to read data from blocks other
than that which is being suspended. The only other
valid command at this time is the Erase Resume
command or Read Status Register command.
During erase suspend mode, the chip can go into a
pseudo-standby mode by taking CE# to V
reduces active current draw.
To resume the erase operation, enable the chip by
taking CE# to V
command, which continues the erase sequence to
completion. As with the end of a standard erase
operation, the status register must be read, cleared,
and the next instruction issued in order to continue.
3.4
The boot block family architecture features a
hardware-lockable boot block so that the kernel
code for the system can be kept secure while the
parameter and main blocks are programmed and
erased independently as necessary. Only the boot
block can be locked independently from the other
blocks. The truth table, Table 9, clearly defines the
write protection methods.
3.4.1
For complete write protection of all blocks in the
flash device, the V
held low. When V
erase operation will result in a error in the status
register.
22
Boot Block Locking
V
PROTECTION
PP
Suspending and Resuming Erase
= V
IL
PP
, then issuing the Erase Resume
IL
PP
is below V
FOR COMPLETE
programming voltage can be
PPLK
, any program or
SEE NEW DESIGN RECOMMENDATIONS
IH
, which
3.4.2
When WP# = V
program/erase operations to the boot block will
result in an status register error. All other blocks
remain unlocked and can be programmed or erased
normally. Note that this feature is overridden and
the boot block unlocked when RP# = V
the WP# pin is not available on the 44-PSOP, the
boot block’s default status is locked when RP# is at
V
information on unlocking on the 8-Mbit 44-PSOP
package.
3.4.3
Two methods can be used to unlock the boot block:
1. WP# = V
2. RP# = V
If both or either of these two conditions are met, the
boot block is unlocked and can be programmed or
erased. See Section 3.4.4 for additional information
on unlocking on the 8-Mbit 44-PSOP package.
3.4.4
The 8-Mbit in the 44-PSOP does not have a WP#
because no other pins were available for the 8-Mbit
upgrade address. Thus, in this density-package
combination only, V
unlock the boot block and unlocking with a logic-
level signal is not possible. If this unlocking
functionality is required, and 12 V is not available
in-system, consider using the 48-TSOP package,
which has a WP# pin and can be unlocked with a
logic-level
combinations have WP# pins.
NOTE: WP# not available on 44-PSOP. In this pkg., treat
as if WP# is tied low, eliminating the last row of this table.
IH
V
V
V
V
V
V
PP
PPLK
PPLK
PPLK
PPLK
or V
IL
Table 9. Write Protection Truth Table
IL
WP# = V
LOCKING
RP# = V
BLOCK UNLOCKING
NOTE FOR 8-MBIT 44-PSOP
PACKAGE
. See Section 3.4.4 for additional
HH
RP#
signal.
V
IH
V
V
V
X
HH
IH
IH
IL
IL
, the boot block is locked and
HH
HH
IL
WP#
V
V
X
X
X
All
FOR BOOT BLOCK
OR WP# = V
IH
IL
(12 V) on RP# is required to
other
All Blocks Locked
(Reset)
All Blocks Unlocked
Boot Block Locked
All Blocks Unlocked
Write Protection
density-package
IH
FOR BOOT
HH
. Since