CY7C1380CV25-167AC Cypress Semiconductor Corp, CY7C1380CV25-167AC Datasheet - Page 2

• Manufacturer Part Number: CY7C1380CV25-167AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1380CV25-167AC

• Density: 18Mb
• Access Time (max): 3.4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 166MHz
• Operating Supply Voltage (typ): 2.5V
• Address Bus: 19b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 4
• Supply Current: 275mA
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (max): 2.625V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 512K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05240 Rev. *C
Logic Block Diagram – CY7C1382CV25 (1M x 18)
A0, A1, A
Logic Block Diagram – CY7C1380CV25 (512K x 36)
1
2
A0, A1, A
3
MODE
BW
ADSC
BW
ADSP
BWE
ADV
BW
BW
MODE
CLK
GW
ADSC
ADSP
CE
CE
CE
OE
ADV
BW
BW
BWE
D
C
ZZ
CLK
GW
CE2
CE3
CE
B
A
OE
1
2
3
ZZ
A
B
1
CONTROL
SLEEP
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
WRITE REGISTER
CONTROL
DQ
DQ
DQ
DQ
SLEEP
REGISTER
ADDRESS
DQ
BYTE
DQ
BYTE
C ,
BYTE
REGISTER
B ,
BYTE
D ,
A ,
ENABLE
DQP
DQP
DQP
DQP
REGISTER
A,
B,
ENABLE
DQP
DQP
C
B
D
A
ADDRESS
REGISTER
B
A
COUNTER AND
CLR
BURST
LOGIC
PIPELINED
CLR
ENABLE
PIPELINED
2
ENABLE
COUNTER
Q1
Q0
2
BURST
LOGIC
A[1:0]
AND
A
[1:0]
Q1
Q0
WRITE DRIVER
WRITE DRIVER
WRITE DRIVER
WRITE DRIVER
DQ
DQ
DQ
DQ
WRITE DRIVER
WRITE DRIVER
BYTE
BYTE
BYTE
C ,
D
B ,
BYTE
A ,
DQ
DQ
,DQP
DQP
DQP
DQP
B,
A,
C
DQP
B
DQP
D
A
B
A
MEMORY
ARRAY
MEMORY
ARRAY
SENSE
AMPS
SENSE
AMPS
REGISTERS
OUTPUT
REGISTERS
OUTPUT
CY7C1380CV25
CY7C1382CV25
OUTPUT
BUFFERS
BUFFERS
OUTPUT
E
E
REGISTERS
INPUT
REGISTERS
Page 2 of 33
INPUT
DQP
DQP
DQP
DQP
D Q s
A
B
C
D
DQs
DQP
DQP
A
B
[+] Feedback