CY7C1386B-133AC Cypress Semiconductor Corp, CY7C1386B-133AC Datasheet - Page 7

• Manufacturer Part Number: CY7C1386B-133AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1386B-133AC

• Density: 18Mb
• Access Time (max): 4.2ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 19b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 245mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 512K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05195 Rev. **
Pin Definitions
Name
V
128M
V
TDO
TMS
TCK
32M
64M
V
V
TDI
NC
DDQ
SSQ
DD
SS
JTAG serial output
Test Mode Select
JTAG serial input
Power supply
synchronous
synchronous
synchronous
JTAG serial
I/O Ground
I/O Power
Ground
Supply
clock
I/O
–
–
Serial data-out to the JTAG circuit. Delivers data on the negative edge of
TCK (BGA only).
Serial data-in to the JTAG circuit. Sampled on the rising edge of TCK (BGA
only).
This pin controls the Test Access Port (TAP) state machine. Sampled on the
rising edge of TCK (BGA only).
Serial clock to the JTAG circuit (BGA only).
Power supply inputs to the core of the device. Should be connected to
3.3V –5% +10% power supply.
Ground for the core of the device. Should be connected to ground of the
system.
Power supply for the I/O circuitry. Should be connected to a 2.5V –5% or
a 3.3V –5% +10% power supply (see page 20).
Ground for the I/O circuitry. Should be connected to ground of the system.
No connects. Pins are not internally connected.
No connects. Reserved for address expansion. Pins are not internally
connected.
Description
CY7C1386B
CY7C1387B
Page 7 of 32