CY7C344-25WMB E2V, CY7C344-25WMB Datasheet - Page 8

• Manufacturer Part Number: CY7C344-25WMB
• Manufacturer: E2V

Specifications of CY7C344-25WMB

• Lead Free Status / Rohs Status: Supplier Unconfirmed

External Asynchronous Switching Characteristics
t
t
t
t
t
t
t
t
f
f
f
f
t
Notes:
19. This specification is a measure of the delay from an asynchronous register clock input to internal feedback of the registered output signal to a combinatorial
20. This parameter is measured with a positive-edge-triggered clock at the register. For negative edge triggering, the t
21. This specification is a measure of the delay associated with the internal register feedback path for an asynchronously clocked register. This delay plus the
22. This parameter indicates the guaranteed maximum frequency at which an asynchronously clocked state machine configuration with external feedback can
23. This specification indicates the guaranteed maximum frequency at which an asynchronously clocked state machine with internal-only feedback can operate.
24. This specification indicates the guaranteed maximum frequency at which an individual output or buried register can be cycled in asynchronously clocked
25. This specification indicates the guaranteed maximum frequency at which an individual output or buried register can be cycled in asynchronously clocked
26. This parameter indicates the minimum time that the previous register output data is maintained on the output pin after an asynchronous register clock input
ACO1
ACO2
AS
AH
AWH
AWL
ACF
AP
MAXA1
MAXA2
MAXA3
MAXA4
AOH
Parameter
output for which the registered output signal is used as an input. Assumes no expanders are used in logic of combinatorial output or the asynchronous clock
input. This parameter is tested periodically by sampling production material.
If a given input is used to clock multiple registers with both positive and negative polarity, t
asynchronous register set-up time, t
in the asynchronous clock path. This parameter is tested periodically by sampling production material.
operate. It is assumed that no expander logic is employed in the clock signal path or data path.
If register output states must also control external points, this frequency can still be observed as long as this frequency is less than 1/t
assumes no expander logic is utilized. This parameter is tested periodically by sampling production material.
mode. This frequency is least of 1/(t
clocked data-path mode. Assumes no expander logic is used.
mode by a clock signal applied to an external dedicated input or an I/O pin.
to an external dedicated input or I/O pin.
Asynchronous Clock Input to Output Delay
Asynchronous Clock Input to Local Feedback to Com-
binatorial Output
Dedicated Input or Feedback Set-Up Time to Asyn-
chronous Clock Input
Input Hold Time from Asynchronous Clock Input
Asynchronous Clock Input HIGH Time
Asynchronous Clock Input LOW Time
Asynchronous Clock to Local Feedback Input
External Asynchronous Clock Period (1/f
External Maximum Frequency in Asynchronous Mode
1/(t
Maximum Internal Asynchronous Frequency 1/(t
t
Data Path Maximum Frequency in Asynchronous
Mode
Maximum Asynchronous Register Toggle Frequency
1/(t
Output Data Stable Time from Asynchronous Clock
Input
AS
) or 1/(t
ACO1
AWH
[4, 26]
[4, 23]
+ t
+ t
AWH
AWL
AS
)
)
+ t
[4, 25]
[4, 22]
AWL
[19]
AWH
AS
, is the minimum internal period for an asynchronously clocked state machine configuration. This delay assumes no expander logic
)
+ t
[4, 23]
AWL
), 1/(t
Description
AS
+ t
AH
), or 1/t
[4]
[4, 20]
ACO1
MAX4
. It also indicates the maximum frequency at which the device may operate in the asynchronously
)
[4, 21]
[4]
8
ACF
Over Operating Range
AWH
+
should be used for both t
Com’l/ Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l /Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l/Ind
Mil
Com’l /Ind
Mil
Com’l/Ind
Mil
Min.
34.4
34.4
62.5
62.5
[7]
7C344B–20
16
16
37
37
50
50
15
15
9
9
9
9
7
7
9
9
7C344–20
AWH
(continued)
and t
AWH
Max.
AWL
20
20
30
30
18
18
and t
.
AWL
Min.
30.3
30.3
7C344B–25
parameters must be swapped.
12
12
12
12
20
20
27
27
40
40
50
50
15
15
11
11
7C344–25
9
9
CY7C344B
ACO1
Max.
CY7C344
25
25
37
37
21
21
. This specification
Unit
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns