CY25100SCF Cypress Semiconductor Corp, CY25100SCF Datasheet

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CY25100SCF

Manufacturer Part Number
CY25100SCF
Description
Manufacturer
Cypress Semiconductor Corp
Type
Programmable PLL Clock Generatorr
Datasheet

Specifications of CY25100SCF

Number Of Elements
1
Supply Current
35mA
Pll Input Freq (min)
8MHz
Pll Input Freq (max)
166MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SOIC
Output Frequency Range
3 to 200MHz
Operating Supply Voltage (min)
3.13V
Operating Supply Voltage (max)
3.45V
Operating Temperature Classification
Commercial
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY25100SCF
Manufacturer:
CY
Quantity:
762
Features
Cypress Semiconductor Corporation
Document #: 38-07499 Rev. *F
Logic Block Diagram
Wide operating output (SSCLK) frequency range
Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
Input frequency range
Integrated phase-locked loop (PLL)
Field programmable
Programmable crystal load capacitor tuning array
Low cycle-to-cycle jitter
3.3V operation
Commercial and industrial operation
Spread spectrum on/off function
Power down or Output Enable function
3 MHz to 200 MHz
Center spread: ±0.25% to ±2.5%
Down spread: –0.5% to –5.0%
External crystal: 8 to 30 MHz fundamental crystals
External reference: 8 to 166 MHz clock
CY25100SCF and CY25100SIF, 8-pin SOIC
CY25100ZCF and CY25100ZIF, 8-pin TSSOP
PD# or OE
SSON#
XIN
XOUT
3
2
4
8
C
C
XIN
XOUT
RFB
198 Champion Court
VDD
1
Field and Factory-Programmable Spread Spectrum
PROGRAMMABLE
CONFIGURATION
MODULATION
VSS
5
CONTROL
PLL
with
Benefits
Services most PC peripherals, networking, and consumer
applications.
Provides wide range of spread percentages for maximum
electromagnetic interference (EMI) reduction, to meet
regulatory agency electromagnetic compliance (EMC) require-
ments. Reduces development and manufacturing costs and
time-to-market.
Eliminates the need for expensive and difficult to use higher
order crystals.
Internal PLL to generate up to 200 MHz output. Able to generate
custom frequencies from an external crystal or a driven source.
In-house programming of samples and prototype quantities is
available using the CY3672 programming kit and
CY3690 (TSSOP) or CY3691 (SOIC) socket adapter.
Production quantities are available through Cypress’s value
added distribution partners or by using third party programmers
from BP Microsystems, HiLo Systems, and others.
Enables fine tuning of output clock frequency by adjusting
C
capacitors.
Suitable for most PC, consumer, and networking applications.
Application compatibility in standard and low power systems.
Ability to enable or disable spread spectrum with an external
pin.
Enables low power state or output clocks to High-Z state.
Load
Clock Generator for EMI Reduction
of the crystal. Eliminates the need for external C
San Jose
DIVIDERS
OUTPUT
MUX
and
,
CA 95134-1709
REFCLK
SSCLK
6
7
Revised November 4, 2008
CY25100
408-943-2600
Load
[+] Feedback

Related parts for CY25100SCF

CY25100SCF Summary of contents

Page 1

... External crystal MHz fundamental crystals ❐ External reference 166 MHz clock ■ Integrated phase-locked loop (PLL) ■ Field programmable ❐ CY25100SCF and CY25100SIF, 8-pin SOIC ❐ CY25100ZCF and CY25100ZIF, 8-pin TSSOP ■ Programmable crystal load capacitor tuning array ■ Low cycle-to-cycle jitter ■ ...

Page 2

Pinouts Pin Description Pin Name 1 VDD 3.3V power supply. 2 XOUT Crystal output. Leave this pin floating if external clock is used. 3 XIN/CLKIN Crystal input or reference clock input. 4 PD#/OE Power down pin: Active LOW. If PD# ...

Page 3

... CY3691 socket adapters are required to program the CY25100. The CY3690 enables users to program CY25100ZCF and CY25100ZIF (TSSOP). CY3691 provides the ability to program CY25100SCF and CY25100SIF (SOIC). Each socket adapter comes with small prototype quantities of CY25100. The CY3690 and CY3691 is a separate orderable item, so the existing users ...

Page 4

Absolute Maximum Rating Supply Voltage (V )........................................ –0.5 to +7. Input Voltage ......................................–0. Storage Temperature (Non condensing)..... –55°C to +125°C Recommended Crystal Specifications Parameter Description F Nominal Crystal Frequency NOM C Nominal Load Capacitance LNOM R ...

Page 5

DC Electrical Characteristics Parameter Description I Supply Current VDD I Standby Current DDS AC Electrical Characteristics Parameter Description DC Output Duty Cycle Output Duty Cycle SR1 Rising Edge Slew Rate SR2 Falling Edge Slew Rate SR3 Rising Edge Slew Rate ...

Page 6

Application Circuit Switching Waveforms Figure 3. Duty Cycle Timing ( OUTPUT Figure 4. Output Rise/Fall Time (SSCLK and REFCLK) OUTPUT Refer to AC Electrical Characteristics table for SR (Slew Rate) values. Figure 5. ...

Page 7

Switching Waveforms Figure 6. Output Enable/Disable Timing V DD OUTPUT ENABLE 0V CLKOUT (Asynchronous) T Informational Graphs [6] 172.5 171.5 Spread Spectrum Profile: Fnom=166MHz, Fmod=30kHz, Spread%= -4% 170.5 169.5 168.5 167.5 166.5 165.5 164.5 163.5 162.5 161.5 160.5 159.5 0 ...

Page 8

Informational Graphs (continued) Duty Cycle vs. REFCLK ( 100 REFCLK (MHz) Measured Spread% vs. VDD over Tem perature ...

Page 9

Informational Graphs (continued) SSCLK EMI Attenuation vs. Spread% (Measured at 7th Harmonic Temp=25C, VDD=3.3V, SSCLK=100MHz, Measured on Cypress Characterization board w ith CLOAD=15pF -10 -12 -14 -16 0.0% 0.5% 1.0% 1.5% 2.0% 2.5% 3.0% Spread ...

Page 10

Ordering Information Part Number Pb-Free CY25100SXCF 8-Pin Small Outline Integrated Circuit (SOIC) CY25100SXIF 8-Pin Small Outline Integrated Circuit (SOIC) CY25100ZXCF 8-Pin Thin Shrunk Small Outline Package (TSSOP) CY25100ZXIF 8-Pin Thin Shrunk Small Outline Package (TSSOP) [7] CY25100SXC-xxxw 8-Pin Small Outline ...

Page 11

Package Diagrams (continued) Figure 7. 8-Pin Thin Shrunk Small Outline Package (4.40 mm Body) Z8 PIN 6.25[0.246] 6.50[0.256] 4.30[0.169] 4.50[0.177] 8 0.65[0.025] BSC. 0.19[0.007] 0.30[0.012] 0.85[0.033] 0.95[0.037] 0.05[0.002] 0.15[0.006] 2.90[0.114] 3.10[0.122] Document #: 38-07499 Rev. *F DIMENSIONS ...

Page 12

... Added Pb-Free header in the ordering information table. Removed Pb-Free from Package description in the ordering information table. Changed CY3672-PRG with CY3672-USB in the ordering information table. Removed CY25100SCF, CY25100SIF, CY25100ZCF, CY25100ZIF, and CY3672 in the ordering information table. Changed Lead free to Pb-Free. 11/06/08 Rising edge slew rate (SR3) minimum limit changed from 1 ...

Page 13

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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